Re: [PATCH v2 0/2] CPPC: reduce FFH feedback-counter sampling skew on arm64

Pengjie Zhang <[email protected]>
Newsgroups org.kernel.vger.linux-acpi,dev.linux.lists.acpica-devel,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-kernel
Message-ID <[email protected]>
Hi Rafael,

Just a gentle ping on this patch. It has been a week and Beata has taken
a look at it. Could you please let me know if you have any comments or
concerns regarding this change?

Thanks,
     Pengjie

On 7/10/2026 9:42 PM, Beata Michalska wrote:
> Looks good to me, though I guess you might need an ack from Rafael (?)
>
> Thank you for the patches.
>
> ---
> BR
> Beata
> On Wed, Jul 08, 2026 at 04:28:16PM +0800, Pengjie Zhang wrote:
>> The legacy CPPC feedback-counter path reads the delivered and reference
>> performance counters separately.
>>
>> On arm64 systems using AMU-backed CPPC FFH counters, each FFH read is
>> served through a cross-CPU counter read helper. Reading the counters
>> separately therefore widens the sampling window between them and can
>> skew the delivered/reference ratio used by cpuinfo_cur_freq. Under heavy
>> load, the skew is observable as transient values that may exceed the
>> platform maximum, as discussed in [1] and [2].
>>
>> This series adds a small generic hook for architectures that can obtain
>> both FFH feedback counters in one operation, while preserving the
>> existing per-register read path as the fallback.
>>
>> Patch 1 adds the generic CPPC hook and uses it from cppc_get_perf_ctrs().
>> Patch 2 implements the hook on arm64 by sampling both AMU counters in a
>> single operation on the target CPU.
>>
>> For detailed test results and data demonstrating the observable skew and
>> the improvements brought by this series, please refer to [3] and [4].
>>
>> [1] https://lore.kernel.org/all/[email protected]/
>> [2] https://lore.kernel.org/all/[email protected]/
>> [3] https://lore.kernel.org/all/[email protected]/
>> [4] https://lore.kernel.org/all/[email protected]/
>>
>> Tested-by: Sumit Gupta <[email protected]>
>> Reviewed-by: Sumit Gupta <[email protected]>
>> Tested-by: Vanshidhar Konda <[email protected]>
>> Reviewed-by: Vanshidhar Konda <[email protected]>
>> Signed-off-by: Pengjie Zhang <[email protected]>
>> ---
>> Changes in v2:
>> - Simplified the CPPC generic layer fallback logic to prevent pointless single-read retries.
>> - Added upfront register validation in the arm64 hook to avoid unnecessary IPI overhead.
>> - Explicitly flipped the -EOPNOTSUPP error to -ENODEV in the arm64 hook when AMU is unsupported, cleanly bypassing redundant CPPC generic fallbacks.
>> - Addressed other kernel-doc and naming feedbacks from Beata.
>> - Added Reviewed-by and Tested-by tags from Vanshidhar and Sumit
>> - Link to v1: https://lore.kernel.org/all/[email protected]/
>>
>> Pengjie Zhang (2):
>>    ACPI: CPPC: add paired FFH feedback-counter read hook
>>    arm64: topology: read CPPC FFH feedback counters in one operation
>>
>>   arch/arm64/kernel/topology.c | 92 ++++++++++++++++++++++++++++++++----
>>   drivers/acpi/cppc_acpi.c     | 50 ++++++++++++++++++--
>>   include/acpi/cppc_acpi.h     |  7 +++
>>   3 files changed, 136 insertions(+), 13 deletions(-)
>>
>> -- 
>> 2.33.0
>>
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