[PATCH v8 0/3] riscv: fix PIO helpers and add optimized percpu ops
Yunhui Cui <[email protected]>
| Newsgroups | org.kernel.vger.linux-arch,dev.linux.lists.llvm,org.infradead.lists.linux-riscv,org.kernel.vger.bpf,org.kernel.vger.linux-kernel,org.kvack.linux-mm |
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| Message-ID | <[email protected]> |
Changes in v8: - Fold the TASK_TI_CPU_NUM cleanup into patch 3. - Pick up Arnd's Reviewed-by tag for patch 1. Changes in v7: - Rename the internal AND helpers for consistency. - Undefine internal percpu helper macros before including asm-generic/percpu.h. Changes in v6: - Keep the RISC-V PIO fix local by directly guarding ins*/outs* helpers. - Add the missing asm/cmpxchg.h include and clean up LR/SC fallback naming. Changes in v5: - Drop the generic HAS_IOPORT_MAP/ioport_map changes. - Fix 8/16-bit LR/SC fallback masking and constraints. - Initialize secondary idle task pcpu_offset before CPU bringup. Changes in v4: - Rework the series into the current PIO helper fix, percpu.h, and thread_info pcpu_offset layout. - Keep the generic pci_iounmap() behavior intact. Changes in v3: - Fix this_cpu_cmpxchg128() build issues when cmpxchg128 is unavailable. - Fix sparse warnings. Changes in v2: - Add non-Zabha percpu add/and/or support. - Add the thread_info pcpu_offset optimization. Changes in v1: - Initial RISC-V percpu.h series using optimized native-width percpu ops. Yunhui Cui (3): riscv: io: avoid null-pointer arithmetic in PIO helpers riscv: introduce percpu.h into include/asm riscv: store percpu offset into thread_info arch/riscv/include/asm/asm.h | 6 +- arch/riscv/include/asm/io.h | 8 + arch/riscv/include/asm/percpu.h | 300 +++++++++++++++++++++++++++ arch/riscv/include/asm/switch_to.h | 8 + arch/riscv/include/asm/thread_info.h | 3 +- arch/riscv/kernel/asm-offsets.c | 2 +- arch/riscv/kernel/smpboot.c | 8 + arch/riscv/net/bpf_jit_comp64.c | 9 +- 8 files changed, 329 insertions(+), 15 deletions(-) create mode 100644 arch/riscv/include/asm/percpu.h base-commit: 7de6ae9e12207ec146f2f3f1e58d1a99317e88bc -- 2.39.5