[PATCH v2 5/6] arm64: dts: qcom: kodiak: mark PCIe root port as bridge
Rahul Samana <[email protected]> Mon, 27 Jul 2026 21:15:05 +0530
| Newsgroups | org.kernel.vger.linux-bluetooth,org.kernel.vger.linux-arm-msm,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel,org.kernel.vger.linux-pci,org.kernel.vger.linux-pm |
|---|---|
| Message-ID | <20260727-rb3-industrial-bt-uart-v2-5-2d100f30e202@oss.qualcomm.com> |
The PCI core needs to associate the DT node below the QCS6490 PCIe host bridge with the enumerated PCI-to-PCI bridge device before child nodes can be matched against the PCI topology. Add compatible = "pciclass,0604" to pcie0_port so child nodes below the bridge can be matched by the PCI device class. Signed-off-by: Rahul Samana <[email protected]> --- arch/arm64/boot/dts/qcom/kodiak.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi index fa540d8c2615..12594967d2c2 100644 --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi @@ -2296,6 +2296,7 @@ pcie0: pcie@1c00000 { status = "disabled"; pcie0_port: pcie@0 { + compatible = "pciclass,0604"; device_type = "pci"; reg = <0x0 0x0 0x0 0x0 0x0>; bus-range = <0x01 0xff>; -- 2.34.1