Re: [PATCH v2 8/8] arm64: dts: renesas: rzg3s-smarc: Enable CAN-FD

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] CAN channels are enabled unconditionally even when their transceiver standby pins are disconnected by hardware switches, rendering the CAN bus physically inoperable.
--

--- Patch [8]: [PATCH v2 8/8] arm64: dts: renesas: rzg3s-smarc: Enable CAN-FD ---
commit f8b012ec526a1699faa0dea73b3d5f10dc6c3d9d
Author: Claudiu Beznea <[email protected]>

arm64: dts: renesas: rzg3s-smarc: Enable CAN-FD

This commit enables the CAN FD controller and its two channels on the
Renesas RZ/G3S SMARC Module. It conditionally sets up the standby GPIOs
for the CAN transceivers based on the states of the SW_GPIO_CAN_PMOD
switches.

> diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
> index 70af605168b07..2be684f559144 100644
> --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
> +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
[ ... ]
> @@ -92,6 +110,22 @@ &audio_clk2 {
>  	clock-frequency = <12288000>;
>  };
>  
> +&canfd {
> +	pinctrl-0 = <&canfd_pins>;
> +	pinctrl-names = "default";
> +	status = "okay";
> +
> +	channel0 {
> +		phys = <&can_transceiver0>;
> +		status = "okay";
> +	};
> +
> +	channel1 {
> +		phys = <&can_transceiver1>;
> +		status = "okay";
> +	};
> +};

[Severity: Medium]
Since SW_GPIO_CAN_PMOD1 and SW_GPIO_CAN_PMOD2 are SW_ON by default, the
transceiver standby pins are disconnected from the SoC GPIOs. Because the
TCAN1042 PHY has an internal pull-up on the STB pin, leaving it floating
forces the transceiver into standby mode.

Does setting status = "okay" here unconditionally expose inoperable CAN bus
interfaces to userspace? Should the channel status be guarded by the same
switch macros used for the standby-gpios properties?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=8