Re: [PATCH v2 2/6] clk: rockchip: Add clock controller for the RV1106

Brian Masney <[email protected]>
Newsgroups org.kernel.vger.linux-clk,org.infradead.lists.linux-arm-kernel,org.infradead.lists.linux-rockchip,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel
Message-ID <[email protected]>
Hi Simon,

On Tue, Jul 14, 2026 at 01:36:39PM -0600, Simon Glass wrote:
> +static void __init rv1106_clk_init(struct device_node *np)
> +{
> +	struct rockchip_clk_provider *ctx;
> +	unsigned long clk_nr;
> +	void __iomem *reg_base;
> +	int ret;
> +
> +	clk_nr = rockchip_clk_find_max_clk_id(rv1106_clk_branches,
> +					      ARRAY_SIZE(rv1106_clk_branches)) + 1;
> +	clk_nr = max(clk_nr,
> +		     rockchip_clk_find_max_clk_id(rv1106_grf_clk_branches,
> +					ARRAY_SIZE(rv1106_grf_clk_branches)) + 1);
> +	reg_base = of_iomap(np, 0);
> +	if (!reg_base) {
> +		pr_err("%s: could not map cru region\n", __func__);
> +		return;
> +	}
> +
> +	ctx = rockchip_clk_init(np, reg_base, clk_nr);
> +	if (IS_ERR(ctx)) {
> +		pr_err("%s: rockchip clk init failed\n", __func__);
> +		iounmap(reg_base);
> +		return;
> +	}
> +
> +	rv1106_pvtpll_init(ctx);
> +
> +	rockchip_clk_register_plls(ctx, rv1106_pll_clks,
> +				   ARRAY_SIZE(rv1106_pll_clks),
> +				   RV1106_GRF_SOC_STATUS0);
> +
> +	rockchip_clk_register_armclk(ctx, ARMCLK, "armclk",
> +				     mux_armclk_p, ARRAY_SIZE(mux_armclk_p),
> +				     &rv1106_cpuclk_data, rv1106_cpuclk_rates,
> +				     ARRAY_SIZE(rv1106_cpuclk_rates));
> +
> +	rockchip_clk_register_branches(ctx, rv1106_clk_branches,
> +				       ARRAY_SIZE(rv1106_clk_branches));
> +
> +	/*
> +	 * The MMC drive and sample phase clocks have their control
> +	 * registers in the GRF region, so they can only be provided when
> +	 * the rockchip,grf property points at a valid syscon.
> +	 */
> +	if (!IS_ERR(ctx->grf)) {
> +		ret = rockchip_clk_add_grf(ctx, ctx->grf, grf_type_sys);
> +		if (ret)
> +			pr_err("%s: failed to add grf: %d\n", __func__, ret);
> +		else
> +			rockchip_clk_register_branches(ctx,
> +					rv1106_grf_clk_branches,
> +					ARRAY_SIZE(rv1106_grf_clk_branches));
> +	}
> +
> +	rockchip_register_restart_notifier(ctx, RV1106_GLB_SRST_FST, NULL);
> +
> +	rockchip_clk_of_add_provider(np, ctx);
> +}
> +
> +CLK_OF_DECLARE(rv1106_cru, "rockchip,rv1106-cru", rv1106_clk_init);

Can this be registered as a platform driver similar to
drivers/clk/rockchip/clk-rk3528.c ?

Brian
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