[PATCH 1/2] dt-bindings: clock: qcom: Add Hawi camera clock controller
Vivek Aknurwar <[email protected]>
| Newsgroups | org.kernel.vger.linux-clk,org.kernel.vger.linux-arm-msm,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
Update the compatible and bindings for camera clock controller (CAMCC) support on the Qualcomm Hawi SoC. Signed-off-by: Vivek Aknurwar <[email protected]> --- .../bindings/clock/qcom,sm8450-camcc.yaml | 36 +++-- include/dt-bindings/clock/qcom,hawi-camcc.h | 165 +++++++++++++++++++++ 2 files changed, 192 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml index b41247b257b1..cdc19418c064 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml @@ -16,6 +16,7 @@ description: | domains on SM8450. See also: + include/dt-bindings/clock/qcom,hawi-camcc.h include/dt-bindings/clock/qcom,kaanapali-camcc.h include/dt-bindings/clock/qcom,kaanapali-cambistmclkcc.h include/dt-bindings/clock/qcom,sm8450-camcc.h @@ -26,15 +27,21 @@ description: | properties: compatible: - enum: - - qcom,kaanapali-cambistmclkcc - - qcom,kaanapali-camcc - - qcom,sm8450-camcc - - qcom,sm8475-camcc - - qcom,sm8550-camcc - - qcom,sm8650-camcc - - qcom,sm8750-cambistmclkcc - - qcom,sm8750-camcc + oneOf: + - enum: + - qcom,hawi-camcc + - qcom,kaanapali-cambistmclkcc + - qcom,kaanapali-camcc + - qcom,sm8450-camcc + - qcom,sm8475-camcc + - qcom,sm8550-camcc + - qcom,sm8650-camcc + - qcom,sm8750-cambistmclkcc + - qcom,sm8750-camcc + - items: + - enum: + - qcom,hawi-cambistmclkcc + - const: qcom,kaanapali-cambistmclkcc clocks: items: @@ -67,6 +74,17 @@ required: allOf: - $ref: qcom,gcc.yaml# + - if: + properties: + compatible: + not: + contains: + enum: + - qcom,kaanapali-cambistmclkcc + - qcom,sm8750-cambistmclkcc + then: + required: + - '#power-domain-cells' - if: properties: compatible: diff --git a/include/dt-bindings/clock/qcom,hawi-camcc.h b/include/dt-bindings/clock/qcom,hawi-camcc.h new file mode 100644 index 000000000000..6ef731738e6e --- /dev/null +++ b/include/dt-bindings/clock/qcom,hawi-camcc.h @@ -0,0 +1,165 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#ifndef _DT_BINDINGS_CLK_QCOM_CAM_CC_HAWI_H +#define _DT_BINDINGS_CLK_QCOM_CAM_CC_HAWI_H + +/* CAM_CC clocks */ +#define CAM_CC_CAM_TOP_AHB_CLK 0 +#define CAM_CC_CAM_TOP_FAST_AHB_CLK 1 +#define CAM_CC_CAMNOC_DCD_XO_CLK 2 +#define CAM_CC_CAMNOC_NRT_AXI_CLK 3 +#define CAM_CC_CAMNOC_NRT_CRE_CLK 4 +#define CAM_CC_CAMNOC_NRT_IPE_NPS_CLK 5 +#define CAM_CC_CAMNOC_NRT_IPE_SCALERS_CLK 6 +#define CAM_CC_CAMNOC_NRT_OFE_MAIN_CLK 7 +#define CAM_CC_CAMNOC_NRT_SQPF_CLK 8 +#define CAM_CC_CAMNOC_RT_AXI_CLK 9 +#define CAM_CC_CAMNOC_RT_AXI_CLK_SRC 10 +#define CAM_CC_CAMNOC_RT_IFE_LITE_CLK 11 +#define CAM_CC_CAMNOC_RT_TFE_0_MAIN_CLK 12 +#define CAM_CC_CAMNOC_RT_TFE_1_MAIN_CLK 13 +#define CAM_CC_CAMNOC_RT_TFE_2_MAIN_CLK 14 +#define CAM_CC_CCI_0_CLK 15 +#define CAM_CC_CCI_0_CLK_SRC 16 +#define CAM_CC_CCI_1_CLK 17 +#define CAM_CC_CCI_1_CLK_SRC 18 +#define CAM_CC_CCI_2_CLK 19 +#define CAM_CC_CCI_2_CLK_SRC 20 +#define CAM_CC_CORE_AHB_CLK 21 +#define CAM_CC_CPHY_RX_CLK_SRC 22 +#define CAM_CC_CRE_AHB_CLK 23 +#define CAM_CC_CRE_CLK 24 +#define CAM_CC_CRE_CLK_SRC 25 +#define CAM_CC_CSI0PHYTIMER_CLK 26 +#define CAM_CC_CSI0PHYTIMER_CLK_SRC 27 +#define CAM_CC_CSI1PHYTIMER_CLK 28 +#define CAM_CC_CSI1PHYTIMER_CLK_SRC 29 +#define CAM_CC_CSI2PHYTIMER_CLK 30 +#define CAM_CC_CSI2PHYTIMER_CLK_SRC 31 +#define CAM_CC_CSI3PHYTIMER_CLK 32 +#define CAM_CC_CSI3PHYTIMER_CLK_SRC 33 +#define CAM_CC_CSI4PHYTIMER_CLK 34 +#define CAM_CC_CSI4PHYTIMER_CLK_SRC 35 +#define CAM_CC_CSI5PHYTIMER_CLK 36 +#define CAM_CC_CSI5PHYTIMER_CLK_SRC 37 +#define CAM_CC_CSID_CLK 38 +#define CAM_CC_CSID_CLK_SRC 39 +#define CAM_CC_CSID_CSIPHY_RX_CLK 40 +#define CAM_CC_CSIPHY0_CLK 41 +#define CAM_CC_CSIPHY1_CLK 42 +#define CAM_CC_CSIPHY2_CLK 43 +#define CAM_CC_CSIPHY3_CLK 44 +#define CAM_CC_CSIPHY4_CLK 45 +#define CAM_CC_CSIPHY5_CLK 46 +#define CAM_CC_CX_GDSC_CLK 47 +#define CAM_CC_DRV_AHB_CLK 48 +#define CAM_CC_DRV_XO_CLK 49 +#define CAM_CC_FAST_AHB_CLK_SRC 50 +#define CAM_CC_GDSC_CLK 51 +#define CAM_CC_ICP_0_AHB_CLK 52 +#define CAM_CC_ICP_0_CLK 53 +#define CAM_CC_ICP_0_CLK_SRC 54 +#define CAM_CC_ICP_1_AHB_CLK 55 +#define CAM_CC_ICP_1_CLK 56 +#define CAM_CC_ICP_1_CLK_SRC 57 +#define CAM_CC_IFE_LITE_AHB_CLK 58 +#define CAM_CC_IFE_LITE_CLK 59 +#define CAM_CC_IFE_LITE_CLK_SRC 60 +#define CAM_CC_IFE_LITE_CPHY_RX_CLK 61 +#define CAM_CC_IFE_LITE_CSID_CLK 62 +#define CAM_CC_IFE_LITE_CSID_CLK_SRC 63 +#define CAM_CC_IPE_NPS_AHB_CLK 64 +#define CAM_CC_IPE_NPS_CLK 65 +#define CAM_CC_IPE_NPS_CLK_SRC 66 +#define CAM_CC_IPE_NPS_FAST_AHB_CLK 67 +#define CAM_CC_IPE_PPS_CLK 68 +#define CAM_CC_IPE_PPS_FAST_AHB_CLK 69 +#define CAM_CC_IPE_SCALERS_CLK 70 +#define CAM_CC_IPE_SCALERS_FAST_AHB_CLK 71 +#define CAM_CC_JPEG_CLK 72 +#define CAM_CC_JPEG_CLK_SRC 73 +#define CAM_CC_MMSS_AHB_CLK 74 +#define CAM_CC_OFE_AHB_CLK 75 +#define CAM_CC_OFE_ANCHOR_CLK 76 +#define CAM_CC_OFE_ANCHOR_FAST_AHB_CLK 77 +#define CAM_CC_OFE_CLK_SRC 78 +#define CAM_CC_OFE_HDR_CLK 79 +#define CAM_CC_OFE_HDR_FAST_AHB_CLK 80 +#define CAM_CC_OFE_MAIN_CLK 81 +#define CAM_CC_OFE_MAIN_FAST_AHB_CLK 82 +#define CAM_CC_OFE_MP_CLK 83 +#define CAM_CC_OFE_MP_FAST_AHB_CLK 84 +#define CAM_CC_PLL0 85 +#define CAM_CC_PLL0_OUT_EVEN 86 +#define CAM_CC_PLL0_OUT_ODD 87 +#define CAM_CC_PLL1 88 +#define CAM_CC_PLL1_OUT_EVEN 89 +#define CAM_CC_PLL2 90 +#define CAM_CC_PLL2_OUT_EVEN 91 +#define CAM_CC_PLL3 92 +#define CAM_CC_PLL3_OUT_EVEN 93 +#define CAM_CC_PLL4 94 +#define CAM_CC_PLL4_OUT_EVEN 95 +#define CAM_CC_PLL5 96 +#define CAM_CC_PLL5_OUT_EVEN 97 +#define CAM_CC_PLL6 98 +#define CAM_CC_PLL6_OUT_EVEN 99 +#define CAM_CC_PLL6_OUT_ODD 100 +#define CAM_CC_PLL7 101 +#define CAM_CC_PLL8 102 +#define CAM_CC_PLL8_OUT_EVEN 103 +#define CAM_CC_QDSS_DEBUG_CLK 104 +#define CAM_CC_QDSS_DEBUG_CLK_SRC 105 +#define CAM_CC_QDSS_DEBUG_XO_CLK 106 +#define CAM_CC_SLEEP_CLK 107 +#define CAM_CC_SLOW_AHB_CLK_SRC 108 +#define CAM_CC_SQPF_AHB_CLK 109 +#define CAM_CC_SQPF_CLK 110 +#define CAM_CC_SQPF_CLK_SRC 111 +#define CAM_CC_SQPF_FAST_AHB_CLK 112 +#define CAM_CC_TFE_0_BAYER_CLK 113 +#define CAM_CC_TFE_0_BAYER_FAST_AHB_CLK 114 +#define CAM_CC_TFE_0_CLK_SRC 115 +#define CAM_CC_TFE_0_MAIN_CLK 116 +#define CAM_CC_TFE_0_MAIN_FAST_AHB_CLK 117 +#define CAM_CC_TFE_1_BAYER_CLK 118 +#define CAM_CC_TFE_1_BAYER_FAST_AHB_CLK 119 +#define CAM_CC_TFE_1_CLK_SRC 120 +#define CAM_CC_TFE_1_MAIN_CLK 121 +#define CAM_CC_TFE_1_MAIN_FAST_AHB_CLK 122 +#define CAM_CC_TFE_2_BAYER_CLK 123 +#define CAM_CC_TFE_2_BAYER_FAST_AHB_CLK 124 +#define CAM_CC_TFE_2_CLK_SRC 125 +#define CAM_CC_TFE_2_MAIN_CLK 126 +#define CAM_CC_TFE_2_MAIN_FAST_AHB_CLK 127 +#define CAM_CC_TITAN_CAMNOC_XO_CLK 128 +#define CAM_CC_TITAN_MNOC_HF_CLK 129 +#define CAM_CC_TITAN_MNOC_SF_CLK 130 +#define CAM_CC_TRACENOC_TPDM_1_CMB_CLK 131 +#define CAM_CC_XO_CLK_SRC 132 + +/* CAM_CC power domains */ +#define CAM_CC_IPE_0_GDSC 0 +#define CAM_CC_OFE_GDSC 1 +#define CAM_CC_SQPF_GDSC 2 +#define CAM_CC_TFE_0_GDSC 3 +#define CAM_CC_TFE_1_GDSC 4 +#define CAM_CC_TFE_2_GDSC 5 +#define CAM_CC_TITAN_TOP_CX_GDSC 6 +#define CAM_CC_TITAN_TOP_GDSC 7 + +/* CAM_CC resets */ +#define CAM_CC_DRV_BCR 0 +#define CAM_CC_ICP_BCR 1 +#define CAM_CC_IPE_0_BCR 2 +#define CAM_CC_OFE_BCR 3 +#define CAM_CC_QDSS_DEBUG_BCR 4 +#define CAM_CC_SQPF_BCR 5 +#define CAM_CC_TFE_0_BCR 6 +#define CAM_CC_TFE_1_BCR 7 +#define CAM_CC_TFE_2_BCR 8 + +#endif -- 2.34.1