Re: [PATCH v8 02/12] dt-bindings: clk: zte: Add zx297520v3 matrix clock and reset controller
Krzysztof Kozlowski <[email protected]>
| Newsgroups | org.kernel.vger.linux-clk,dev.linux.lists.mfd,org.infradead.lists.linux-arm-kernel,org.infradead.lists.linux-phy,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <20260728-wealthy-raspberry-lobster-bcfc8f@quoll> |
On Mon, Jul 27, 2026 at 09:24:17PM +0300, Stefan Dösinger wrote: > This controller contains clocks and resets for high speed devices on the > zx297520v3 board and hardware spinlocks that I expect will be necessary > to communicate correctly with the LTE DSP firmware blob. > > I don't know much about the hwlocks yet other than that they exist, so > there is no header yet adding meaning to their indices. Presumably that > meaning doesn't exist in hardware and is de facto defined by ZTE's > firmware blobs running on the rprocs. > > The zte-zx297520v3-crm driver will instantiate separate MFD children for > clocks and resets, which are handled by separate clock and reset > drivers. > > Signed-off-by: Stefan Dösinger <[email protected]> > > --- Reviewed-by: Krzysztof Kozlowski <[email protected]> Best regards, Krzysztof