[PATCH 4/5] arm64: dts: altera: move Agilex72 DT and use altr prefix

[email protected] Thu, 6 Aug 2026 17:25:04 +0800
Newsgroups org.kernel.vger.linux-clk,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel
Message-ID <a3de82b47b6b7638159d19c87da1e99e93fe2e7e.1786006669.git.evon.chiam@altera.com>
From: "Chiam, Evon" <[email protected]>

Move the Agilex72 SoC and SoCDK device trees from dts/intel to
dts/altera. Update the board and SoC compatible strings to use
the "altr" vendor.

Signed-off-by: Chiam, Evon <[email protected]>
---
 arch/arm64/boot/dts/altera/Makefile                            | 3 ++-
 arch/arm64/boot/dts/{intel => altera}/socfpga_agilex72.dtsi    | 2 +-
 .../boot/dts/{intel => altera}/socfpga_agilex72_socdk.dts      | 2 +-
 arch/arm64/boot/dts/intel/Makefile                             | 1 -
 4 files changed, 4 insertions(+), 4 deletions(-)
 rename arch/arm64/boot/dts/{intel => altera}/socfpga_agilex72.dtsi (98%)
 rename arch/arm64/boot/dts/{intel => altera}/socfpga_agilex72_socdk.dts (84%)

diff --git a/arch/arm64/boot/dts/altera/Makefile b/arch/arm64/boot/dts/altera/Makefile
index 540bb5ae746b..a1a9ccba5334 100644
--- a/arch/arm64/boot/dts/altera/Makefile
+++ b/arch/arm64/boot/dts/altera/Makefile
@@ -1,5 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0-only
-dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_stratix10_socdk.dtb \
+dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_agilex72_socdk.dtb \
+				socfpga_stratix10_socdk.dtb \
 				socfpga_stratix10_socdk_emmc.dtb \
 				socfpga_stratix10_socdk_nand.dtb \
 				socfpga_stratix10_swvp.dtb
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex72.dtsi b/arch/arm64/boot/dts/altera/socfpga_agilex72.dtsi
similarity index 98%
rename from arch/arm64/boot/dts/intel/socfpga_agilex72.dtsi
rename to arch/arm64/boot/dts/altera/socfpga_agilex72.dtsi
index c29c2afcaab7..354c775f577b 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex72.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_agilex72.dtsi
@@ -7,7 +7,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 
 / {
-	compatible = "intel,socfpga-agilex72";
+	compatible = "altr,socfpga-agilex72";
 	#address-cells = <2>;
 	#size-cells = <2>;
 
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex72_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_agilex72_socdk.dts
similarity index 84%
rename from arch/arm64/boot/dts/intel/socfpga_agilex72_socdk.dts
rename to arch/arm64/boot/dts/altera/socfpga_agilex72_socdk.dts
index 998f19f492b3..0959850cff66 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex72_socdk.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_agilex72_socdk.dts
@@ -6,7 +6,7 @@
 
 / {
 	model = "Altera SoCFPGA Agilex72 SoCDK";
-	compatible = "intel,socfpga-agilex72-socdk", "intel,socfpga-agilex72";
+	compatible = "altr,socfpga-agilex72-socdk", "altr,socfpga-agilex72";
 
 	aliases {
 		serial0 = &uart0;
diff --git a/arch/arm64/boot/dts/intel/Makefile b/arch/arm64/boot/dts/intel/Makefile
index 270c70fdf084..088a03b89c99 100644
--- a/arch/arm64/boot/dts/intel/Makefile
+++ b/arch/arm64/boot/dts/intel/Makefile
@@ -8,7 +8,6 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_agilex_n6000.dtb \
 				socfpga_agilex5_socdk_013b.dtb \
 				socfpga_agilex5_socdk_modular.dtb \
 				socfpga_agilex5_socdk_nand.dtb \
-				socfpga_agilex72_socdk.dtb \
 				socfpga_agilex7m_socdk.dtb \
 				socfpga_n5x_socdk.dtb
 dtb-$(CONFIG_ARCH_KEEMBAY) += keembay-evm.dtb
-- 
2.43.7