[PATCH RFT 0/2] clk: sunxi-ng: fix A523/T527 single-divider clocks

Andre asked whether we would post the A523/T527 conversions for the clocks
whose ccu_mp descriptors declare one divider field with width zero. This
series implements those conversions.

Patch 1 adds a feature-aware M-divider helper so M-only clocks can retain
the CCU update-bit handling. Patch 2 converts MBUS, IOMMU, and DRAM to that
M-only class and converts HSTIMER0-5 and R-TIMER0-2 to the existing P-only
class.

I do not have matching A523/T527 hardware, so this is deliberately an RFT
series and carries no Tested-by claim. The series has passed semantic and
register-bit preservation models, KUnit tests, strict checkpatch, sparse,
GCC and Clang builds, full arm64 Image/modules/DTB builds, reproducibility
checks, and hostile review. It also applies and builds cleanly together
with the current A523/T527 GPU clock-model v2 series.

not tested on A523/T527 hardware; testing on actual hardware is needed.

In particular, testing of clock rate changes and affected users of MBUS,
IOMMU, DRAM, HSTIMER0-5, and R-TIMER0-2 would be appreciated.

---

Enzo Adriano (2):
  clk: sunxi-ng: add feature-aware M divider helper
  clk: sunxi-ng: a523: use single-divider clock helpers

 drivers/clk/sunxi-ng/ccu-sun55i-a523-r.c |  37 +++---
 drivers/clk/sunxi-ng/ccu-sun55i-a523.c   | 136 +++++++++++------------
 drivers/clk/sunxi-ng/ccu_div.h           |  18 ++-
 3 files changed, 96 insertions(+), 95 deletions(-)


base-commit: 8cdeaa50eae8dad34885515f62559ee83e7e8dda
-- 
2.53.0