Re: [PATCH v2 15/15] ARM: dts: qcom: Add initial device tree for Kuno SoC

[email protected]
Newsgroups org.kernel.vger.linux-clk,org.kernel.vger.linux-devicetree
Message-ID <[email protected]>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The `tlmm` (pinctrl) node is missing the `wakeup-parent = <&pdc>;` property, which breaks GPIO-based system wakeup from deep sleep.
--

--- Patch [15]: [PATCH v2 15/15] ARM: dts: qcom: Add initial device tree for Kuno SoC ---
commit 788737dd9e1817959acde679eb75eaf0aa270260
Author: Hardeep Sharma <[email protected]>

ARM: dts: qcom: Add initial device tree for Kuno SoC

This commit adds the SoC-level DTSI and IDP board DTS for the Qualcomm Kuno
SoC. It brings in initial peripheral nodes including the Cortex-A7 CPU, RPMh
RSC, GCC, TLMM pin controller, and GENI UART console.

> diff --git a/arch/arm/boot/dts/qcom/qcom-kuno.dtsi b/arch/arm/boot/dts/qcom/qcom-kuno.dtsi
> new file mode 100644
> --- /dev/null
> +++ b/arch/arm/boot/dts/qcom/qcom-kuno.dtsi
[ ... ]
> +		restart@c264000 {
> +			compatible = "qcom,pshold";
> +			reg = <0x0c264000 0x1000>;
> +		};
> +
> +		tlmm: pinctrl@f000000 {
> +			compatible = "qcom,kuno-tlmm";
> +			reg = <0x0f000000 0x400000>;
> +			interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			gpio-ranges = <&tlmm 0 0 110>;
> +			interrupt-controller;
> +			#interrupt-cells = <2>;

[Severity: Medium]
Is the wakeup-parent property missing from the tlmm node?

Without wakeup-parent = <&pdc>; being set here, the hierarchical IRQ routing
to the PDC won't be established. This causes a regression where GPIO-based
system wakeup from deep sleep states will not function, as interrupts
configured as wakeups will only be routed to the GIC, which is bypassed or
unpowered during sleep.

> +
> +			uart_console_active: uart-console-active-state {
> +				pins = "gpio8", "gpio9";
> +				function = "qup0_se3_mira";
[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=15
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