Re: [PATCH] dt-bindings: clock: qcom,sm6375-gcc: Merge SM7150 into SM6375
| Newsgroups | org.kernel.vger.linux-clk,org.kernel.vger.linux-devicetree |
|---|---|
| Message-ID | <[email protected]> |
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Medium] Incomplete update of the binding description when merging SM7150 support. -- --- Patch [1]: [PATCH] dt-bindings: clock: qcom,sm6375-gcc: Merge SM7150 into SM6375 --- commit 92315f069f3a56f62591f2cf108c846e8914866e Author: Krzysztof Kozlowski <[email protected]> dt-bindings: clock: qcom,sm6375-gcc: Merge SM7150 into SM6375 Bindings for Qualcomm SM7150 and SM6375 GCC clock controllers are merged into a single file since they share identical structures. The SM7150 binding is deleted and added as a compatible string to the SM6375 file. > diff --git a/Documentation/devicetree/bindings/clock/qcom,sm6375-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm6375-gcc.yaml > index 66dfa72fa9751..b4ad2ad14d85e 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,sm6375-gcc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,sm6375-gcc.yaml > @@ -4,10 +4,13 @@ > $id: http://devicetree.org/schemas/clock/qcom,sm6375-gcc.yaml# > $schema: http://devicetree.org/meta-schemas/core.yaml# > > -title: Qualcomm Global Clock & Reset Controller on SM6375 > +title: Qualcomm Global Clock & Reset Controller on SM6375 and SM7150 > > maintainers: > - Konrad Dybcio <[email protected]> > + - Bjorn Andersson <[email protected]> > + - Danila Tikhonov <[email protected]> > + - David Wronek <[email protected]> > > description: | > Qualcomm global clock control module provides the clocks, resets and power [Severity: Medium] Should the description block be updated to include a reference to the SM7150 header file? The deleted qcom,sm7150-gcc.yaml file contained: See also: include/dt-bindings/clock/qcom,sm7150-gcc.h Leaving only the SM6375 header reference might mislead developers configuring SM7150 hardware into using incorrect clock indices, as the clock IDs typically differ between the two chips. [ ... ] -- Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=1