Re: [PATCH v3 15/15] ARM: dts: qcom: Add initial device tree for Kuno SoC

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The `tlmm` node is missing the `wakeup-parent` property, which breaks GPIO-based system wakeups from deep sleep.
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--- Patch [15]: [PATCH v3 15/15] ARM: dts: qcom: Add initial device tree for Kuno SoC ---
commit a3ae80ec946ae96cfeef01d12c9e58806dffcb0b
Author: Hardeep Sharma <[email protected]>

ARM: dts: qcom: Add initial device tree for Kuno SoC

This commit adds the initial SoC-level device tree (qcom-kuno.dtsi) and
IDP board device tree (qcom-kuno-idp.dts) for the Qualcomm Kuno SoC. It
includes basic peripherals like the CPU, RPMh RSC, GCC, TLMM, and GENI UART.

[ ... ]

> diff --git a/arch/arm/boot/dts/qcom/qcom-kuno.dtsi b/arch/arm/boot/dts/qcom/qcom-kuno.dtsi
> --- /dev/null
> +++ b/arch/arm/boot/dts/qcom/qcom-kuno.dtsi

[ ... ]

> +		tlmm: pinctrl@f000000 {
> +			compatible = "qcom,kuno-tlmm";
> +			reg = <0x0f000000 0x400000>;
> +			interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			gpio-ranges = <&tlmm 0 0 110>;
> +			interrupt-controller;
> +			#interrupt-cells = <2>;

[Severity: Medium]
Will GPIO-based interrupts be able to wake the system from deep sleep without
a wakeup-parent property here?

The Kuno SoC defines deep sleep states (standalone-pc and pc) where the
primary GIC is powered off. Without wakeup-parent = <&pdc>; in the tlmm node,
the pinctrl-msm driver won't establish the hierarchical IRQ domain linking
GPIO interrupts to the always-on Power Domain Controller. 

Doesn't this mean GPIO wakeups will only route to the GIC and be lost during
sleep?

> +
> +			uart_console_active: uart-console-active-state {
> +				pins = "gpio8", "gpio9";

[ ... ]

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Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=15