Re: [PATCH 02/10] dt-bindings: power: Add r8a774a3 SYSC power domain definitions
Krzysztof Kozlowski <[email protected]>
| Newsgroups | org.kernel.vger.linux-clk,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel,org.kernel.vger.linux-pm,org.kernel.vger.linux-renesas-soc |
|---|---|
| Message-ID | <[email protected]> |
On 21/08/2026 17:03, Ayman Chaudhry wrote: > This patch adds power domain indices for the Renesas RZ/G2M v3.0 Please do not use "This commit/patch/change", but imperative mood. See longer explanation here: https://elixir.bootlin.com/linux/v6.16/source/Documentation/process/submitting-patches.rst#L94 > (a.k.a. R8A774A3) SoC. > > Signed-off-by: Ayman Chaudhry <[email protected]> > --- > include/dt-bindings/power/r8a774a3-sysc.h | 30 +++++++++++++++++++++++ Filename must match compatible. > 1 file changed, 30 insertions(+) > create mode 100644 include/dt-bindings/power/r8a774a3-sysc.h > > diff --git a/include/dt-bindings/power/r8a774a3-sysc.h b/include/dt-bindings/power/r8a774a3-sysc.h > new file mode 100644 > index 000000000000..5694a422b771 > --- /dev/null > +++ b/include/dt-bindings/power/r8a774a3-sysc.h > @@ -0,0 +1,30 @@ > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ > +/* > + * Copyright (C) 2026 Renesas Electronics Corp. > + */ > +#ifndef __DT_BINDINGS_POWER_R8A774A3_SYSC_H__ > +#define __DT_BINDINGS_POWER_R8A774A3_SYSC_H__ > + > +/* > + * These power domain indices match the numbers of the interrupt bits No, that's not a binding then. Also, why is this sent separately from the binding? > + * representing the power areas in the various Interrupt Registers > + * (e.g. SYSCISR, Interrupt Status Register) > + */ > + > +#define R8A774A3_PD_CA57_CPU0 0 > +#define R8A774A3_PD_CA57_CPU1 1 > +#define R8A774A3_PD_CA53_CPU0 5 No, value is 2. Or not a binding. Best regards, Krzysztof