Re: [PATCH v18 05/13] PCI/AER: Introduce AER-CXL protocol error kfifo
| Newsgroups | org.kernel.vger.linux-cxl,org.kernel.vger.linux-pci |
|---|---|
| Message-ID | <[email protected]> |
> CXL VH RAS handling requires a path for the AER driver to hand off > CXL protocol errors to cxl_core for logging and recovery before PCIe > AER recovery tears down the device. Add > drivers/pci/pcie/aer_cxl_vh.c to implement this handoff via a kfifo-backed > work item. > > Introduce is_aer_internal_error() to identify CXL protocol errors > from AER internal error status bits across both correctable and > uncorrectable severities. > > Introduce is_cxl_error() to gate the VH kfifo path. > > Introduce struct cxl_proto_err_work_data to carry the error source > PCI device and severity through the kfifo. Encapsulate the kfifo, > per-producer spinlock, registration rwsem, and work pointer in struct > [ ... ] > bridging code. > > Co-developed-by: Dan Williams <[email protected]> > Signed-off-by: Dan Williams <[email protected]> > Signed-off-by: Terry Bowman <[email protected]> Sashiko has reviewed this patch and found no issues. It looks great! -- Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=5