Re: [PATCH v3 03/10] ACPI: APEI: GHES: Validate CXL protocol error section length before RAS cap copy
Alison Schofield <[email protected]>
| Newsgroups | org.kernel.vger.linux-cxl,org.kernel.vger.linux-acpi |
|---|---|
| Message-ID | <[email protected]> |
On Fri, Jul 17, 2026 at 09:16:40AM -0700, Dave Jiang wrote: > sashiko-bot flagged an out-of-bounds read driven by an unvalidated > firmware dvsec_len. > > cxl_cper_setup_prot_err_work_data() locates the RAS Capability block at > prot_err + sizeof(*prot_err) + dvsec_len and copies it, but dvsec_len is > firmware controlled and never validated. > > Extend cxl_cper_sec_prot_err_valid() to verify the section can hold the > header, and that the header, DVSEC and RAS Capability block all fit > within the reported section length. > > Reported-by: [email protected] > Link: https://sashiko.dev/#/patchset/20260617-topics-ahmtib01-ras_ffh_arm_internal_review-v6-0-91f725174aa0@arm.com?part=6 > Link: https://lore.kernel.org/linux-cxl/[email protected]/ > Fixes: 315c2f0b53ba ("acpi/ghes, cper: Recognize and cache CXL Protocol errors") > Assisted-by: Claude:claude-sonnet-4-6 > Reviewed-by: Ben Cheatham <[email protected]> > Signed-off-by: Dave Jiang <[email protected]> Reviewed-by: Alison Schofield <[email protected]>