[PATCH v2 35/44] qapi: convert intro sections for cxl.json
John Snow <[email protected]>
| Newsgroups | org.kernel.vger.linux-cxl,org.kernel.vger.linux-edac,org.nongnu.qemu-devel,org.nongnu.qemu-trivial |
|---|---|
| Message-ID | <[email protected]> |
(Trivial) Signed-off-by: John Snow <[email protected]> --- qapi/cxl.json | 128 ++++++++++++++++++++++---------------------------- 1 file changed, 56 insertions(+), 72 deletions(-) diff --git a/qapi/cxl.json b/qapi/cxl.json index 81d6198ba03..9422d5a0e2d 100644 --- a/qapi/cxl.json +++ b/qapi/cxl.json @@ -9,9 +9,9 @@ ## # @CxlEventLog: -# -# CXL has a number of separate event logs for different types of -# events. Each such event log is handled and signaled independently. +# CXL has a number of separate event logs for different types of +# events. Each such event log is handled and signaled +# independently. # # @informational: Information Event Log # @@ -32,9 +32,8 @@ ## # @CXLCommonEventBase: -# -# Common event base for a CXL Event (CXL r3.2 8.2.10.2.1 -# Table 8-55 Common Event Record Format). +# Common event base for a CXL Event (CXL r3.2 8.2.10.2.1 Table +# 8-55 Common Event Record Format). # # @path: CXL type 3 device canonical QOM path # @@ -63,8 +62,7 @@ ## # @CXLGeneralMediaEvent: -# -# Event record for a General Media Event (CXL r3.2 8.2.10.2.1.1). +# Event record for a General Media Event (CXL r3.2 8.2.10.2.1.1). # # @dpa: Device Physical Address (relative to @path device). Note # lower bits include some flags. See CXL r3.2 Table 8-57 General @@ -118,10 +116,9 @@ ## # @cxl-inject-general-media-event: -# -# Inject an event record for a General Media Event (CXL r3.2 -# 8.2.10.2.1.1). This event type is reported via one of the event -# logs specified via the log parameter. +# Inject an event record for a General Media Event (CXL r3.2 +# 8.2.10.2.1.1). This event type is reported via one of the event +# logs specified via the log parameter. # # Since: 8.1 ## @@ -130,8 +127,7 @@ ## # @CXLDRAMEvent: -# -# Event record for a DRAM Event (CXL r3.2 8.2.10.2.1.2). +# Event record for a DRAM Event (CXL r3.2 8.2.10.2.1.2). # # @dpa: Device Physical Address (relative to @path device). Note # lower bits include some flags. See CXL r3.2 Table 8-58 DRAM @@ -201,10 +197,9 @@ ## # @cxl-inject-dram-event: -# -# Inject an event record for a DRAM Event (CXL r3.2 8.2.10.2.1.2). -# This event type is reported via one of the event logs -# specified via the log parameter. +# Inject an event record for a DRAM Event (CXL r3.2 8.2.10.2.1.2). +# This event type is reported via one of the event logs specified +# via the log parameter. # # Since: 8.1 ## @@ -213,8 +208,7 @@ ## # @CXLMemModuleEvent: -# -# Event record for a Memory Module Event (CXL r3.2 8.2.10.2.1.3). +# Event record for a Memory Module Event (CXL r3.2 8.2.10.2.1.3). # # @type: Device Event Type. See CXL r3.2 Table 8-59 Memory Module # Event Record for bit definitions for bit definiions. @@ -267,10 +261,9 @@ ## # @cxl-inject-memory-module-event: -# -# Inject an event record for a Memory Module Event (CXL r3.2 -# 8.2.10.2.1.3). This event includes a copy of the Device Health info -# at the time of the event. +# Inject an event record for a Memory Module Event (CXL r3.2 +# 8.2.10.2.1.3). This event includes a copy of the Device Health +# info at the time of the event. # # Since: 8.1 ## @@ -279,13 +272,12 @@ ## # @cxl-inject-poison: -# -# Poison records indicate that a CXL memory device knows that a -# particular memory region may be corrupted. This may be because of -# locally detected errors (e.g. ECC failure) or poisoned writes -# received from other components in the system. This injection -# mechanism enables testing of the OS handling of poison records which -# may be queried via the CXL mailbox. +# Poison records indicate that a CXL memory device knows that a +# particular memory region may be corrupted. This may be because +# of locally detected errors (e.g. ECC failure) or poisoned writes +# received from other components in the system. This injection +# mechanism enables testing of the OS handling of poison records +# which may be queried via the CXL mailbox. # # @path: CXL type 3 device canonical QOM path # @@ -300,10 +292,9 @@ ## # @CxlUncorErrorType: -# -# Type of uncorrectable CXL error to inject. These errors are -# reported via an AER uncorrectable internal error with additional -# information logged at the CXL device. +# Type of uncorrectable CXL error to inject. These errors are +# reported via an AER uncorrectable internal error with additional +# information logged at the CXL device. # # @cache-data-parity: Data error such as data parity or data ECC error # CXL.cache @@ -365,8 +356,7 @@ ## # @CXLUncorErrorRecord: -# -# Record of a single error including header log. +# Record of a single error including header log. # # @type: Type of error # @@ -383,9 +373,8 @@ ## # @cxl-inject-uncorrectable-errors: -# -# Command to allow injection of multiple errors in one go. This -# allows testing of multiple header log handling in the OS. +# Command to allow injection of multiple errors in one go. This +# allows testing of multiple header log handling in the OS. # # @path: CXL Type 3 device canonical QOM path # @@ -399,8 +388,7 @@ ## # @CxlCorErrorType: -# -# Type of CXL correctable error to inject +# Type of CXL correctable error to inject # # @cache-data-ecc: Data ECC error on CXL.cache # @@ -432,12 +420,11 @@ ## # @cxl-inject-correctable-error: -# -# Command to inject a single correctable error. Multiple error -# injection of this error type is not interesting as there is no -# associated header log. These errors are reported via AER as a -# correctable internal error, with additional detail available from -# the CXL device. +# Command to inject a single correctable error. Multiple error +# injection of this error type is not interesting as there is no +# associated header log. These errors are reported via AER as a +# correctable internal error, with additional detail available +# from the CXL device. # # @path: CXL Type 3 device canonical QOM path # @@ -450,10 +437,9 @@ ## # @CxlDynamicCapacityExtent: -# -# A single dynamic capacity extent. This is a contiguous allocation -# of memory by Device Physical Address within a single Dynamic -# Capacity Region on a CXL Type 3 Device. +# A single dynamic capacity extent. This is a contiguous +# allocation of memory by Device Physical Address within a single +# Dynamic Capacity Region on a CXL Type 3 Device. # # @offset: The offset (in bytes) to the start of the region where the # extent belongs to. @@ -471,10 +457,9 @@ ## # @CxlExtentSelectionPolicy: -# -# The policy to use for selecting which extents comprise the added -# capacity, as defined in Compute Express Link (CXL) Specification, -# Revision 3.1, Table 7-70. +# The policy to use for selecting which extents comprise the added +# capacity, as defined in Compute Express Link (CXL) +# Specification, Revision 3.1, Table 7-70. # # @free: Device is responsible for allocating the requested memory # capacity and is free to do this using any combination of @@ -512,12 +497,12 @@ ## # @cxl-add-dynamic-capacity: -# -# Initiate adding dynamic capacity extents to a host. This simulates -# operations defined in Compute Express Link (CXL) Specification, -# Revision 3.1, Section 7.6.7.6.5. Note that, currently, establishing -# success or failure of the full Add Dynamic Capacity flow requires -# out of band communication with the OS of the CXL host. +# Initiate adding dynamic capacity extents to a host. This +# simulates operations defined in Compute Express Link (CXL) +# Specification, Revision 3.1, Section 7.6.7.6.5. Note that, +# currently, establishing success or failure of the full Add +# Dynamic Capacity flow requires out of band communication with +# the OS of the CXL host. # # @path: path to the CXL Dynamic Capacity Device in the QOM tree. # @@ -558,10 +543,9 @@ ## # @CxlExtentRemovalPolicy: -# -# The policy to use for selecting which extents comprise the released -# capacity, defined in the "Flags" field in Compute Express Link (CXL) -# Specification, Revision 3.1, Table 7-71. +# The policy to use for selecting which extents comprise the +# released capacity, defined in the "Flags" field in Compute +# Express Link (CXL) Specification, Revision 3.1, Table 7-71. # # @tag-based: Extents are selected by the device based on tag, with # no requirement for contiguous extents. @@ -578,12 +562,12 @@ ## # @cxl-release-dynamic-capacity: -# -# Initiate release of dynamic capacity extents from a host. This -# simulates operations defined in Compute Express Link (CXL) -# Specification, Revision 3.1, Section 7.6.7.6.6. Note that, -# currently, success or failure of the full Release Dynamic Capacity -# flow requires out of band communication with the OS of the CXL host. +# Initiate release of dynamic capacity extents from a host. This +# simulates operations defined in Compute Express Link (CXL) +# Specification, Revision 3.1, Section 7.6.7.6.6. Note that, +# currently, success or failure of the full Release Dynamic +# Capacity flow requires out of band communication with the OS of +# the CXL host. # # @path: path to the CXL Dynamic Capacity Device in the QOM tree. # -- 2.55.0