Re: [PATCH v5 4/5] cxl: Add HDM-DB region creation

Davidlohr Bueso <[email protected]> Thu, 23 Jul 2026 16:06:29 -0700
Newsgroups org.kernel.vger.linux-cxl
Message-ID <20260723230629.yklwrj3nr6dbblgp@offworld>
On Tue, 23 Jun 2026, Richard Cheng wrote:

>On Mon, Jun 15, 2026 at 07:55:28AM +0800, Davidlohr Bueso wrote:
>> @@ -2772,6 +2796,7 @@ static ssize_t create_region_store(struct device *dev, const char *buf,
>>  				   size_t len, enum cxl_partition_mode mode)
>>  {
>>  	struct cxl_root_decoder *cxlrd = to_cxl_root_decoder(dev);
>> +	enum cxl_decoder_type target_type;
>>  	struct cxl_region *cxlr;
>>  	int rc, id;
>>
>> @@ -2779,7 +2804,14 @@ static ssize_t create_region_store(struct device *dev, const char *buf,
>>  	if (rc != 1)
>>  		return -EINVAL;
>>
>> -	cxlr = __create_region(cxlrd, mode, id, CXL_DECODER_HOSTONLYMEM);
>> +	/*
>> +	 * The CFMWS dictates endpoint coherency: a BI-restricted Window
>> +	 * produces an HDM-DB region; otherwise HDM-H.
>> +	 */
>> +	target_type = cxl_root_decoder_is_bi(cxlrd) ?
>> +		CXL_DECODER_DEVMEM : CXL_DECODER_HOSTONLYMEM;
>> +
>> +	cxlr = __create_region(cxlrd, mode, id, target_type);
>
>Hi Davidlohr,
>
>I have a question about this part, I do not understand FW so please correct me
>if I'm raising some stupid questions.
>
>It derives the region type from the root decoder's BI flag, but on auto-discovery
>path, it still and it needs to take target_type from the endpoint decoder's HW-read
>type, 2 different sources that can disagree.
>An auto-discovered DEVMEM region could hit the "DEVMEM && root bit && !cxlds->bi" check
>and reject in cxl_region_attach() before cxl_bi_setup() has executed.
>
>But path 3's init_hdm_decoder() -ENXIO on a committed BI bit means such a decoder will
>never reach construct_region(), so this scenario might never happen.
>If so, maybe a changelog or comment noting that HDM-DB auto-discovery is out of scope would
>help?

Yes, currently auto-discovered regions are unsupported, but this is certainly documented
throughout the series (and I have also discussed this with Ben).

However, v6 comes with a proposal for supporting this, as an incremental patch. The main
requirements are 1) move cxl_bi_setup() from cxl_mem_probe() into cxl_endpoint_port_probe()
and 2) decoupling the read-only topology check from cxl_bi_setup(). As such:

cxl_endpoint_port_probe()
	cxl_bi_probe_capable(port); // read-only topology check
	devm_cxl_endpoint_decoders_setup(port);  // decoder enumeration relies on the above
	cxl_bi_setup(port); // perform the actual topology-wide BI enablement
	discover_region() // auto-assemble regions

With some qemu hacks I was able to succesfully assemble a region:

[    0.709507] cxl_core:init_hdm_decoder:1136: cxl_port endpoint2: decoder2.0: range: 0x190000000-0x19fffffff iw: 1 ig: 256
[    0.717141] cxl_core:__cxl_bi_ctrl_endpoint:1210: cxl_pci 0000:0d:00.0: adopting firmware-enabled BI
[    0.720518] cxl_core:__construct_region:3806: cxl_pci 0000:0d:00.0: mem0:decoder2.0: __construct_region region0 res: [mem 0x190000000-0x19fffffff flags 0x200] iw: 1 ig: 256
[    0.723118] cxl_core:cxl_region_sort_targets:2079: cxl region0: region sort successful
[    0.728158] cxl_core:devm_cxl_add_dax_region:101: cxl_region region0: region0: register dax_region0
[    0.728952] cxl_core:cxl_bus_probe:2298: cxl_region region0: probe: 0
# cat /sys/bus/cxl/devices/region0/commit
1
# cat /sys/bus/cxl/devices/decoder2.0/bi
1

Of course, the platform has to be sane and support it, otherwise:

[    0.775144] cxl_core:__cxl_bi_ctrl_endpoint:1210: cxl_pci 0000:0d:00.0: adopting firmware-enabled BI
[    0.775963] cxl_pci 0000:0d:00.0: mem0:decoder2.0 BI decoder in a non-BI window
[    0.776652] cxl_port:discover_region:55: cxl decoder2.0: failed to add to region: 0x190000000-0x19fffffff

Anyway, fyi.

Thanks,
Davidlohr