Re: [PATCH v19 10/14] cxl: Update CXL Endpoint AER handler
Alison Schofield <[email protected]> Mon, 3 Aug 2026 19:17:39 -0700
| Newsgroups | org.kernel.vger.linux-cxl,org.kernel.vger.linux-acpi,org.kernel.vger.linux-doc,org.kernel.vger.linux-kernel,org.kernel.vger.linux-pci |
|---|---|
| Message-ID | <[email protected]> |
On Mon, Aug 03, 2026 at 05:18:06PM -0500, Terry Bowman wrote: > Rename cxl_error_detected() to cxl_pci_error_detected() and rename > the struct pci_error_handlers instance to cxl_pci_error_handlers to > avoid shadowing the struct type tag. > > Document the unconditional CXL RAS read policy: on a dead link, > readl() returns 0xFFFFFFFF which is interpreted as UCE bits set and > triggers a panic. If RAS registers are not mapped the read is > skipped and the frozen/perm_failure switch cases defer to AER > recovery for devices without active CXL.mem traffic. Reviewed-by: Alison Schofield <[email protected]>