Re: [PATCH v4 4/6] cxl/region: Support mixed-granularity user created regions
Jonathan Cameron <[email protected]>
| Newsgroups | org.kernel.vger.linux-cxl |
|---|---|
| Message-ID | <20260821230009.245382d2@jic23-huawei> |
On Thu, 20 Aug 2026 16:31:22 -0700 Alison Schofield <[email protected]> wrote: > User region creation currently requires an interleaving root to have > the same granularity as the region. > > That rejects valid mixed-granularity layouts where the region > granularity is finer than the root granularity. A region granularity > coarser than the root remains invalid because it produces incorrect > DPA translations. > > Allow a region granularity finer than an interleaving root and > continue to reject a coarser granularity. Validate the complete > ways/granularity relationship when the region endpoints are attached. > > For example, CXL 4.0 Section 9.13.1.1 Table 9-7 describes a 6-way > region at IGB across three host bridges as a 3-way root interleave at > 2 * IGB with a 2-way interleave at IGB below it. > > Signed-off-by: Alison Schofield <[email protected]> Reviewed-by: Jonathan Cameron <[email protected]> > --- > drivers/cxl/core/region.c | 11 ++--------- > 1 file changed, 2 insertions(+), 9 deletions(-) > > diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c > index 637d1b60a570..4bbfb7cd7e01 100644 > --- a/drivers/cxl/core/region.c > +++ b/drivers/cxl/core/region.c > @@ -571,15 +571,8 @@ static int set_interleave_granularity(struct cxl_region *cxlr, int val) > if (rc) > return rc; > > - /* > - * When the host-bridge is interleaved, disallow region granularity != > - * root granularity. Regions with a granularity less than the root > - * interleave result in needing multiple endpoints to support a single > - * slot in the interleave (possible to support in the future). Regions > - * with a granularity greater than the root interleave result in invalid > - * DPA translations (invalid to support). > - */ > - if (cxld->interleave_ways > 1 && val != cxld->interleave_granularity) > + /* Region granularity must not be coarser than an interleaving root's */ > + if (cxld->interleave_ways > 1 && val > cxld->interleave_granularity) > return -EINVAL; > > lockdep_assert_held_write(&cxl_rwsem.region);