[RESEND PATCH v7 07/16] arm64: dts: st: add ltdc pins for stm32mp25
Dario Binacchi <[email protected]>
| Newsgroups | org.kernel.vger.linux-devicetree,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
Add the LTDC pins used on MicroGEA-STM32MP257-RMM board. Signed-off-by: Dario Binacchi <[email protected]> --- (no changes since v5) Changes in v5: - Increase slew-rate to <1> to support the 27 MHz pixel clock and prevent timing violations. Suggested by Sashiko arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 71 +++++++++++++++++++ 1 file changed, 71 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi index db485b9ed904..50f454630cf2 100644 --- a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi @@ -260,6 +260,77 @@ pins { }; }; + /omit-if-no-ref/ + ltdc_pins_a: ltdc-0 { + pins { + pinmux = <STM32_PINMUX('C', 6, AF14)>, /* LCD_CLK */ + <STM32_PINMUX('G', 2, AF13)>, /* LCD_HSYNC */ + <STM32_PINMUX('G', 1, AF13)>, /* LCD_VSYNC */ + <STM32_PINMUX('C', 5, AF14)>, /* LCD_DE */ + <STM32_PINMUX('H', 4, AF10)>, /* LCD_R0 */ + <STM32_PINMUX('F', 7, AF13)>, /* LCD_R1 */ + <STM32_PINMUX('C', 11, AF13)>, /* LCD_R2 */ + <STM32_PINMUX('A', 1, AF11)>, /* LCD_R3 */ + <STM32_PINMUX('B', 15, AF13)>, /* LCD_R4 */ + <STM32_PINMUX('G', 3, AF13)>, /* LCD_R5 */ + <STM32_PINMUX('A', 10, AF12)>, /* LCD_R6 */ + <STM32_PINMUX('G', 7, AF13)>, /* LCD_R7 */ + <STM32_PINMUX('F', 8, AF13)>, /* LCD_G0 */ + <STM32_PINMUX('H', 5, AF10)>, /* LCD_G1 */ + <STM32_PINMUX('C', 9, AF13)>, /* LCD_G2 */ + <STM32_PINMUX('C', 10, AF13)>, /* LCD_G3 */ + <STM32_PINMUX('A', 6, AF10)>, /* LCD_G4 */ + <STM32_PINMUX('G', 11, AF13)>, /* LCD_G5 */ + <STM32_PINMUX('G', 12, AF13)>, /* LCD_G6 */ + <STM32_PINMUX('A', 9, AF12)>, /* LCD_G7 */ + <STM32_PINMUX('F', 6, AF13)>, /* LCD_B0 */ + <STM32_PINMUX('A', 3, AF11)>, /* LCD_B1 */ + <STM32_PINMUX('G', 15, AF13)>, /* LCD_B2 */ + <STM32_PINMUX('I', 0, AF13)>, /* LCD_B3 */ + <STM32_PINMUX('I', 1, AF13)>, /* LCD_B4 */ + <STM32_PINMUX('A', 7, AF10)>, /* LCD_B5 */ + <STM32_PINMUX('F', 5, AF13)>, /* LCD_B6 */ + <STM32_PINMUX('I', 4, AF13)>; /* LCD_B7 */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + }; + + /omit-if-no-ref/ + ltdc_sleep_pins_a: ltdc-sleep-0 { + pins { + pinmux = <STM32_PINMUX('C', 6, ANALOG)>, /* LCD_CLK */ + <STM32_PINMUX('G', 2, ANALOG)>, /* LCD_HSYNC */ + <STM32_PINMUX('G', 1, ANALOG)>, /* LCD_VSYNC */ + <STM32_PINMUX('C', 5, ANALOG)>, /* LCD_DE */ + <STM32_PINMUX('H', 4, ANALOG)>, /* LCD_R0 */ + <STM32_PINMUX('F', 7, ANALOG)>, /* LCD_R1 */ + <STM32_PINMUX('C', 11, ANALOG)>, /* LCD_R2 */ + <STM32_PINMUX('A', 1, ANALOG)>, /* LCD_R3 */ + <STM32_PINMUX('B', 15, ANALOG)>, /* LCD_R4 */ + <STM32_PINMUX('G', 3, ANALOG)>, /* LCD_R5 */ + <STM32_PINMUX('A', 10, ANALOG)>, /* LCD_R6 */ + <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_R7 */ + <STM32_PINMUX('F', 8, ANALOG)>, /* LCD_G0 */ + <STM32_PINMUX('H', 5, ANALOG)>, /* LCD_G1 */ + <STM32_PINMUX('C', 9, ANALOG)>, /* LCD_G2 */ + <STM32_PINMUX('C', 10, ANALOG)>, /* LCD_G3 */ + <STM32_PINMUX('A', 6, ANALOG)>, /* LCD_G4 */ + <STM32_PINMUX('G', 11, ANALOG)>, /* LCD_G5 */ + <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_G6 */ + <STM32_PINMUX('A', 9, ANALOG)>, /* LCD_G7 */ + <STM32_PINMUX('F', 6, ANALOG)>, /* LCD_B0 */ + <STM32_PINMUX('A', 3, ANALOG)>, /* LCD_B1 */ + <STM32_PINMUX('G', 15, ANALOG)>, /* LCD_B2 */ + <STM32_PINMUX('I', 0, ANALOG)>, /* LCD_B3 */ + <STM32_PINMUX('I', 1, ANALOG)>, /* LCD_B4 */ + <STM32_PINMUX('A', 7, ANALOG)>, /* LCD_B5 */ + <STM32_PINMUX('F', 5, ANALOG)>, /* LCD_B6 */ + <STM32_PINMUX('I', 4, ANALOG)>; /* LCD_B7 */ + }; + }; + /omit-if-no-ref/ ospi_port1_clk_pins_a: ospi-port1-clk-0 { pins { -- 2.43.0