Re: [PATCH] i3c: dw: fix APB clock name

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [High] This problem wasn't introduced by this patch, but the return value of `dw_i3c_master_enable_clks()` is ignored in `dw_i3c_master_runtime_resume()`.
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--- Patch [1]: [PATCH] i3c: dw: fix APB clock name ---
commit 686892a7f9278958827b79c6f3b4b10f19a623b2
Author: Jisheng Zhang <[email protected]>

i3c: dw: fix APB clock name

This commit fixes a mismatch between the APB clock name in the code and the
device tree bindings. It changes the clock name requested by the driver from
pclk to apb to match the ABI.

> diff --git a/drivers/i3c/master/dw-i3c-master.c b/drivers/i3c/master/dw-i3c-master.c
> index 2f8c0c4683e06..0625587f15274 100644
> --- a/drivers/i3c/master/dw-i3c-master.c
> +++ b/drivers/i3c/master/dw-i3c-master.c
> @@ -1579,7 +1579,7 @@ int dw_i3c_common_probe(struct dw_i3c_master *master,
>  	if (IS_ERR(master->core_clk))
>  		return PTR_ERR(master->core_clk);
>  
> -	master->pclk = devm_clk_get_optional_enabled(&pdev->dev, "pclk");
> +	master->pclk = devm_clk_get_optional_enabled(&pdev->dev, "apb");

[Severity: High]
This isn't a bug introduced by this patch, but since we are modifying clock
handling here, does dw_i3c_master_runtime_resume() need to check the return
value of dw_i3c_master_enable_clks()?

In drivers/i3c/master/dw-i3c-master.c:dw_i3c_master_runtime_resume():

	pinctrl_pm_select_default_state(dev);
	dw_i3c_master_enable_clks(master);
	reset_control_deassert(master->core_rst);

If the clock framework fails to enable the clocks during runtime resume,
dw_i3c_master_enable_clks() will return a negative error code. This is
currently ignored, and the driver proceeds to deassert the reset and access
hardware registers. 

Can this lead to an unrecoverable bus fault or system crash if the registers
are accessed without an active clock?

>  	if (IS_ERR(master->pclk))
>  		return PTR_ERR(master->pclk);
>

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Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=1