Re: [PATCH 2/4] dt-bindings: net: dsa: Add SoC-e switch IP and DSA bindings

Vasilij Strassheim <[email protected]> Mon, 03 Aug 2026 17:29:47 +0200
Newsgroups org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel,org.kernel.vger.netdev
Organization Linutronix GmbH
Message-ID <[email protected]>
On Wed, 2026-07-29 at 19:11 +0200, Andrew Lunn wrote:
> > +description: |
> > +  This node is the MDIO-bus device entry for the SoC-e DSA switch driver.
> > +  It is a lightweight configuration node that lives on the MDIO bus of the
> > +  SoC Ethernet controller acting as the DSA conduit (CPU port).
> 
> Must it be the conduit interfaces MDIO bus? There are boards which
> exist using Marvell switches where the MDIO bus of the conduit
> interface is not a Linux MDIO bus, because it is an intel i210, and
> intel likes reinventing the wheel and does not use the Linux MDIO bus
> infrastructure. So the MDIO interface of the switch is connected to
> two GPIOs and a Linux bit bashing MDIO bus is used.
> 
There are synthesis options for various management interfaces. MDIO and
MMIO are two of them. I only have one variant for the memory-mapped
version. For v2, I'll discard everything else and update the
documentation accordingly.

> > +  soce,num-ports:
> > +    $ref: /schemas/types.yaml#/definitions/uint32
> > +    description: |
> > +      Total number of switch ports (external/user ports plus the CPU uplink
> > +      port). Must be greater than zero and not exceed the selected IP variant.
> 
> Why is this needed if we already have a description of the ports?

Not needed, I will change it in the next version.

> 
>     Andrew

Thanks,
Vasilij