Re: [PATCH v3 7/8] riscv: dts: eswin: add I2C controller support

[email protected] Tue, 04 Aug 2026 11:22:51 +0000
Newsgroups org.kernel.vger.linux-devicetree
Message-ID <[email protected]>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Incorrect pinctrl assignment for AON I2C controllers, mapping them to LSP I2C pins instead of AON I2C pins.
--

--- Patch [7]: [PATCH v3 7/8] riscv: dts: eswin: add I2C controller support ---
commit dd055880a3b8b5096248d3b1a4bdcec3e5acbe01
Author: Pritesh Patel <[email protected]>

riscv: dts: eswin: add I2C controller support

This commit adds I2C nodes for the EIC7700 SoC and enables corresponding
slave devices for the HiFive Premier P550 board.

> diff --git a/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts b/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts
> index 3101fd90d1714..50c15e08a57f8 100644
> --- a/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts
> +++ b/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts

[ ... ]

> @@ -130,6 +130,62 @@ &gpio111_pins {
>  	input-disable;
>  };
>  
> +&aon_i2c0 {
> +	status = "okay";
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&i2c0_pins>;

[Severity: High]
Should this use the AON pins (&i2c10_pins) instead of the LSP pins?

Assigning &i2c0_pins here configures the pads for the Low Speed Peripheral
i2c0 controller, leaving the AON I2C bus disconnected from the external
pads and preventing communication with the EEPROM.

> +
> +	eeprom@50 {
> +		compatible = "atmel,24c02";
> +		reg = <0x50>;
> +	};
> +};
> +
> +&aon_i2c1 {
> +	status = "okay";
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&i2c1_pins>;

[Severity: High]
Similarly, should this use &i2c11_pins for the aon_i2c1 controller?

Routing the AON controller to the LSP i2c1 pins will cause the ADC and
power sensor to fail on boot due to being physically disconnected.

> +
> +	adc@10 {

[ ... ]

-- 
Sashiko AI review ยท https://sashiko.dev/#/patchset/[email protected]?part=7