Re: [PATCH v8 09/22] RISC-V: Add Ssccfg/Smcdeleg ISA extension definition and parsing
Paul Walmsley <[email protected]>
| Newsgroups | org.kernel.vger.linux-devicetree,org.infradead.lists.linux-arm-kernel,org.infradead.lists.linux-riscv,org.kernel.vger.linux-kernel,org.kernel.vger.linux-perf-users |
|---|---|
| Message-ID | <[email protected]> |
On Wed, 1 Jul 2026, Atish Patra wrote: > From: Atish Patra <[email protected]> > > Smcdeleg extension allows the M-mode to delegate selected counters > to S-mode so that it can access those counters and correpsonding > hpmevent CSRs without M-mode. > > Ssccfg (‘Ss’ for Privileged architecture and Supervisor-level > extension, ‘ccfg’ for Counter Configuration) provides access to > delegated counters and new supervisor-level state. > > This patch just enables these definitions and enable parsing. > > Signed-off-by: Atish Patra <[email protected]> Thanks, queued for v7.3. - Paul