Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The driver applies firmware-specified IRQ trigger types without configuring the sensor's polarity to match, breaking active-high interrupt configurations.
--
--- Patch [3]: [PATCH v3 3/4] iio: accel: mma8452: Only apply trigger type when not set by firmware ---
commit 15bd5e2afb9b0b1a0a93c58982fed1331a0ecfe5
Author: Esben Haabendal <[email protected]>
iio: accel: mma8452: Only apply trigger type when not set by firmware
This commit updates the driver to respect the firmware-provided interrupt
trigger type, falling back to an active-low trigger if no type is
specified by the firmware.
> diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c
> index f645a5c6fd1c2..723ca3d9cb96b 100644
> --- a/drivers/iio/accel/mma8452.c
> +++ b/drivers/iio/accel/mma8452.c
> @@ -1683,9 +1683,14 @@ static int mma8452_probe(struct i2c_client *client)
> goto trigger_cleanup;
>
> if (client->irq) {
> + unsigned long irq_flags;
> +
> + irq_flags = irq_get_trigger_type(client->irq);
> + if (irq_flags == IRQ_TYPE_NONE)
> + irq_flags = IRQF_TRIGGER_LOW;
> + irq_flags |= IRQF_ONESHOT;
> ret = request_threaded_irq(client->irq, NULL, mma8452_interrupt,
> - IRQF_TRIGGER_LOW | IRQF_ONESHOT,
> - client->name, indio_dev);
> + irq_flags, client->name, indio_dev);
[Severity: High]
Does this cause an interrupt mismatch if the firmware specifies an
active-high interrupt?
Looking at mma8452_probe, the driver requests the IRQ with the
firmware-specified polarity, but it doesn't seem to program the sensor
hardware to match. The MMA8452 sensor defaults to active-low interrupts
after a software reset.
Because the driver doesn't update the IPOL bit in MMA8452_CTRL_REG3 when an
active-high trigger is requested, the sensor will still drive an active-low
signal. This mismatch between the IRQ controller expectation and hardware
output could lead to missed interrupts or interrupt storms.
> if (ret)
> goto buffer_cleanup;
> }
--
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=3
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