Re: [PATCH v4 2/2] clk: qcom: Add LPASS VA CSR heartbeat pulse clock

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Missing architecture dependencies in `QCOM_CLK_LPASS_HEARTBEAT_PULSE` Kconfig entry.
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--- Patch [2]: [PATCH v4 2/2] clk: qcom: Add LPASS VA CSR heartbeat pulse clock ---
commit f03b41ee3ba8e25df484407c379a0d86e064e1b4
Author: Sarath Ganapathiraju <[email protected]>

clk: qcom: Add LPASS VA CSR heartbeat pulse clock

This commit introduces the LPASS VA CSR driver to model the rate generator
as a clock provider. It allows the HeartBeat Pulse to be enabled and
disabled automatically alongside other clocks during runtime PM operations.

> diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
> index d1fc9bf87126b..d9a4ceb1d3a03 100644
> --- a/drivers/clk/qcom/Kconfig
> +++ b/drivers/clk/qcom/Kconfig
> @@ -2040,6 +2040,18 @@ config CLK_GFM_LPASS_SM8250
>  	  Support for the Glitch Free Mux (GFM) Low power audio
>            subsystem (LPASS) clocks found on SM8250 SoCs.
>  
> +config QCOM_CLK_LPASS_HEARTBEAT_PULSE
> +	tristate "Qualcomm LPASS VA CSR heartbeat pulse clock provider"
> +	depends on COMMON_CLK
> +	select REGMAP_MMIO

[Severity: Low]
Should this configuration depend on ARCH_QCOM or COMPILE_TEST?

Without architecture constraints, this SoC-specific clock driver is exposed
in the configuration menu for all architectures. Adding a dependency on
ARCH_QCOM || COMPILE_TEST would prevent this menuconfig pollution.

[ ... ]

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Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=2