Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The pinctrl mask enables I2C master mode but fails to explicitly clear the mutually exclusive I2C slave mode bit, potentially leaving the hardware in an invalid state.
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--- Patch [10]: [PATCH v10 10/36] pinctrl: airoha: fix I2C1 pin mux config for AN7581 ---
commit d4a94527c7cabb1267ba3d80a5ef64b6898faf1e
Author: Daniel Schwierzeck <[email protected]>
pinctrl: airoha: fix I2C1 pin mux config for AN7581
The pin mux on GPIOs 1 and 2 on AN7581 supports I2C in master and
slave mode. When selecting I2C the according bits (bit 13 for master,
bit 11 for slave) must be set in REG_GPIO_2ND_I2C_MODE. This commit
fixes the i2c1 pin group to set bits 0 and 13 to set I2C1 master mode by
default.
> diff --git a/drivers/pinctrl/airoha/pinctrl-airoha.c b/drivers/pinctrl/airoha/pinctrl-airoha.c
> index ee2bd0ee8c40f..2695342adfc76 100644
> --- a/drivers/pinctrl/airoha/pinctrl-airoha.c
> +++ b/drivers/pinctrl/airoha/pinctrl-airoha.c
> @@ -1158,8 +1158,8 @@ static const struct airoha_pinctrl_func_group i2c_func_group[] = {
> .regmap[0] = {
> AIROHA_FUNC_MUX,
> REG_GPIO_2ND_I2C_MODE,
> - GPIO_2ND_I2C_MODE_MASK,
> - GPIO_2ND_I2C_MODE_MASK
> + GPIO_2ND_I2C_MODE_MASK | GPIO_I2C_MASTER_MODE_MODE,
> + GPIO_2ND_I2C_MODE_MASK | GPIO_I2C_MASTER_MODE_MODE,
[Severity: Medium]
Will this configuration mask leave the mutually exclusive I2C slave mode bit
set if it was already enabled?
Because GPIO_I2C_SLAVE_MODE_MODE is omitted from the mask, the slave bit
won't be explicitly cleared when applying this configuration via
regmap_update_bits().
If a bootloader had previously enabled slave mode (bit 11), setting master
mode (bit 13) here without clearing bit 11 could leave both bits set and
potentially cause the hardware to enter an undefined state.
> },
> .regmap_size = 1,
> },
--
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=10
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