Re: [PATCH v2 11/16] arm64: dts: renesas: r9a08g046: Add fcpvd node
Tommaso Merciai <[email protected]>
| Newsgroups | org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel,org.kernel.vger.linux-renesas-soc |
|---|---|
| Message-ID | <anNg6h_2YCY87ND_@tom-desktop> |
On Wed, Jul 29, 2026 at 01:55:03PM +0100, Biju wrote: > From: Biju Das <[email protected]> > > Add fcpvd node to RZ/G3L SoC DTSI. > Reviewed-by: Tommaso Merciai <[email protected]> Kind regards, Tommaso > Signed-off-by: Biju Das <[email protected]> > --- > v1->v2: > * No change. > --- > arch/arm64/boot/dts/renesas/r9a08g046.dtsi | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi b/arch/arm64/boot/dts/renesas/r9a08g046.dtsi > index bf0dbac66d14..03693f01228a 100644 > --- a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi > +++ b/arch/arm64/boot/dts/renesas/r9a08g046.dtsi > @@ -696,6 +696,17 @@ ssi3: ssi@100e4c00 { > status = "disabled"; > }; > > + fcpvd: fcp@10880000 { > + compatible = "renesas,r9a08g046-fcpvd", "renesas,fcpv"; > + reg = <0 0x10880000 0 0x10000>; > + clocks = <&cpg CPG_MOD R9A08G046_LCDC_CLK_A>, > + <&cpg CPG_MOD R9A08G046_LCDC_CLK_P>, > + <&cpg CPG_MOD R9A08G046_LCDC_CLK_D>; > + clock-names = "aclk", "pclk", "vclk"; > + resets = <&cpg R9A08G046_LCDC_RESET_N>; > + power-domains = <&cpg>; > + }; > + > gpu: gpu@108b0000 { > compatible = "renesas,r9a08g046-mali", > "arm,mali-bifrost"; > -- > 2.43.0 >