[PATCH 1/2] dt-bindings: clock: qcom,qcs8300-gcc: Add TSCSS clocks and resets
Imran Shaik <[email protected]>
| Newsgroups | org.kernel.vger.linux-devicetree,org.kernel.vger.linux-arm-msm,org.kernel.vger.linux-clk,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
Add the missing GCC TSCSS clocks and reset IDs that are required for the Timestamp Counter Subsystem (TSCSS) functionality on Qualcomm QCS8300 SoC. Signed-off-by: Imran Shaik <[email protected]> --- include/dt-bindings/clock/qcom,qcs8300-gcc.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/include/dt-bindings/clock/qcom,qcs8300-gcc.h b/include/dt-bindings/clock/qcom,qcs8300-gcc.h index a0083b1d212692825251d6a49e15b9129c1eb1b0..3c674c7baaba91815b13450e647b41053bd7330d 100644 --- a/include/dt-bindings/clock/qcom,qcs8300-gcc.h +++ b/include/dt-bindings/clock/qcom,qcs8300-gcc.h @@ -191,6 +191,11 @@ #define GCC_VIDEO_AXI0_CLK 181 #define GCC_VIDEO_AXI1_CLK 182 #define GCC_VIDEO_XO_CLK 183 +#define GCC_GPLL5 184 +#define GCC_TSCSS_AHB_CLK 185 +#define GCC_TSCSS_CNTR_CLK_SRC 186 +#define GCC_TSCSS_ETU_CLK 187 +#define GCC_TSCSS_GLOBAL_CNTR_CLK 188 /* GCC power domains */ #define GCC_EMAC0_GDSC 0 @@ -230,5 +235,6 @@ #define GCC_VIDEO_BCR 26 #define GCC_VIDEO_AXI0_CLK_ARES 27 #define GCC_VIDEO_AXI1_CLK_ARES 28 +#define GCC_TSCSS_BCR 29 #endif -- 2.34.1