Re: [PATCH net-next v11 2/9] dt-bindings: net: lan9645x: add LAN9645X switch bindings

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] The schema lacks an `mdio` node definition while setting `unevaluatedProperties: false` at the root, which inadvertently prevents instantiation of the integrated PHYs referenced in the example.
- [Medium] Invalid constraint and usage of RGMII internal delay properties in combination with `phy-mode = "rgmii"`.
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--- Patch [2]: [PATCH net-next v11 2/9] dt-bindings: net: lan9645x: add LAN9645X switch bindings ---
commit 36eb3256c1e8bdeb280de04a105905650e50438f
Author: Jens Emil Schulz Østergaard <[email protected]>

dt-bindings: net: lan9645x: add LAN9645X switch bindings

Add bindings for LAN9645X switch. We use a fallback compatible for the
smallest SKU microchip,lan96455s-switch.

> diff --git a/Documentation/devicetree/bindings/net/dsa/microchip,lan96455s-switch.yaml b/Documentation/devicetree/bindings/net/dsa/microchip,lan96455s-switch.yaml
> new file mode 100644
> index 0000000000000..043fb48922b41
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/dsa/microchip,lan96455s-switch.yaml
> @@ -0,0 +1,111 @@
[ ... ]
> +        properties:
> +          rx-internal-delay-ps:
> +            const: 2000
> +
> +          tx-internal-delay-ps:
> +            const: 2000

[Severity: Medium]
Is it intended to restrict the rx-internal-delay-ps and tx-internal-delay-ps
properties to exactly 2000?

[ ... ]
> +required:
> +  - compatible
> +  - reg
> +  - ethernet-ports
> +
> +unevaluatedProperties: false

[Severity: Medium]
Since the switch has integrated PHYs, will users need to define them in an
mdio node to correctly resolve the phy-handle references?

If so, won't this unevaluatedProperties: false at the root level reject the
device tree, as the mdio node is not defined in the properties block or
inherited from dsa.yaml?

[ ... ]
> +            ethernet-port@7 {
> +                reg = <7>;
> +                phy-mode = "rgmii";
> +                ethernet = <&cpu_host_port>;
> +                rx-internal-delay-ps = <2000>;
> +                tx-internal-delay-ps = <2000>;

[Severity: Medium]
Can this combination of phy-mode = "rgmii" and a 2000ps internal delay be used
here?

According to the ethernet controller bindings, phy-mode = "rgmii" implies
the delay is implemented on the PCB. Adding a 2000ps internal MAC delay on
top of this might result in a double delay.

If the hardware has fixed internal delays, should this use
phy-mode = "rgmii-id" instead?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260805-dsa_lan9645x_switch_driver_base-v11-0-007ebc983a0a@microchip.com?part=2