Re: [PATCH v5 01/10] dt-bindings: reserved-memory: Document Tegra VPR

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The examples use 64-bit values for `size` and `alignment` but are missing a parent `reserved-memory` node to define `#size-cells = <2>`.
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--- Patch [1]: [PATCH v5 01/10] dt-bindings: reserved-memory: Document Tegra VPR ---
commit f3aef7e4bf1dca49011b483a566145d2ddfdd64a
Author: Thierry Reding <[email protected]>

dt-bindings: reserved-memory: Document Tegra VPR

This commit documents the device tree bindings for the NVIDIA Tegra Video
Protection Region (VPR). It defines a fixed VPR using the "reg" property
and a resizable VPR using "size" and "alignment".

> diff --git a/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra-video-protection-region.yaml b/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra-video-protection-region.yaml
> new file mode 100644
> index 0000000000000..862bfd3913786
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra-video-protection-region.yaml

[ ... ]

> +examples:
> +  - |
> +    /* resizable VPR */
> +    protected {
> +      compatible = "nvidia,tegra-video-protection-region";
> +
> +      size = <0x0 0x70000000>;
> +      alignment = <0x0 0x100000>;

[Severity: Low]
Will this cause dt_binding_check to fail?

The 64-bit values for size and alignment contain 2 cells each. This violates
the core reserved-memory.yaml schema when parsed with the default root
node context, which sets #size-cells = <1>.

Could the examples be wrapped in a reserved-memory parent node that
explicitly sets #address-cells = <2> and #size-cells = <2>?

> +      reusable;
> +    };

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Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=1