[PATCH v2] arm64: dts: allwinner: a64: olinuxino: Fix phy-mode

The 'rgmii' mode does not appear to describe the RGMII timing in Olimex
A64-OlinuXino boards. The PCB layout shows that the clock and data
traces have roughly the same lengths for both RX and TX and, thus, do
not appear to implement the 2 ns RGMII delay or introduce any
significant delay.

According to the KSZ9031RNX datasheet, the PHY adds a typical 1.2 ns RX
delay and no TX delay by default. The 'rgmii-id' mode causes the PHY
driver to enable appropriate internal RGMII delays.

Packet loss in the downlink direction is observed with the 'rgmii' mode
and is severe enough to interfere with downloads and disrupt software
installation. No packet loss is observed with 'rgmii-id'.

Adjusting the TX delay in the DT was found to be unnecessary with
'rgmii-id'.

Signed-off-by: Roman Riabenko <[email protected]>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
index fd3794678c33..8cb2381e21da 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
@@ -102,10 +102,9 @@ &ehci1 {
 &emac {
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii_pins>;
-	phy-mode = "rgmii";
+	phy-mode = "rgmii-id";
 	phy-handle = <&ext_rgmii_phy>;
 	phy-supply = <&reg_dcdc1>;
-	allwinner,tx-delay-ps = <600>;
 	status = "okay";
 };
 
-- 
2.54.0