Re: [PATCH v22 net-next 05/12] net/nebula-matrix: add common resource implementation
Jakub Kicinski <[email protected]>
| Newsgroups | org.kernel.vger.linux-doc,org.kernel.vger.linux-kernel,org.kernel.vger.netdev |
|---|---|
| Message-ID | <[email protected]> |
This is an AI-generated review of your patch. The human sending this email has considered the AI review valid, or at least plausible. --- --- Patch [5]: [PATCH v22 net-next 05/12] net/nebula-matrix: add common resource implementation --- commit d40e580d6fb636a87bb6f2eb1a3079e1e85c78a0 Author: illusion wang <[email protected]> net/nebula-matrix: add common resource implementation The patch introduces the common resource implementation for the Nebula Matrix driver. It provides conversions among vsi_id, func_id, eth_id, and pf_id, and sets up initialization for the control devices. > diff --git a/drivers/net/ethernet/nebula-matrix/nbl/nbl_hw/nbl_hw_leonis/nbl_hw_leonis.c b/drivers/net/ethernet/nebula-matrix/nbl/nbl_hw/nbl_hw_leonis/nbl_hw_leonis.c > index b37df49f86c80..4c7eea24c70ed 100644 > --- a/drivers/net/ethernet/nebula-matrix/nbl/nbl_hw/nbl_hw_leonis/nbl_hw_leonis.c > +++ b/drivers/net/ethernet/nebula-matrix/nbl/nbl_hw/nbl_hw_leonis/nbl_hw_leonis.c [ ... ] > @@ -133,6 +154,14 @@ static u32 nbl_hw_get_host_pf_mask(struct nbl_hw_mgt *hw_mgt) > return data; > } > > +static u8 nbl_hw_get_real_bus(struct nbl_hw_mgt *hw_mgt) > +{ > + u32 data; > + > + data = nbl_hw_rd32(hw_mgt, NBL_PCIE_HOST_TL_CFG_BUSDEV); [Severity: High] Will this cause a kernel panic due to an out-of-bounds MMIO read? During device initialization, nbl_res_ctrl_dev_sriov_info_init() calls hw_ops->get_real_bus(), which performs an MMIO read on NBL_PCIE_HOST_TL_CFG_BUSDEV. Since NBL_PCIE_HOST_TL_CFG_BUSDEV is defined using NBL_INTF_HOST_PCIE_BASE (which is roughly a 21 MiB offset), and the driver only maps a 16 MiB PCI BAR during nbl_hw_init_leonis(), this appears to read from an unmapped physical address. Similarly, the call to hw_ops->get_host_pf_mask() from nbl_res_init_pf_num() will read from NBL_PCIE_HOST_K_PF_MASK_REG, which also evaluates to an out-of-bounds register address. > + return FIELD_GET(NBL_PCIE_BUS_MASK, data); > +} > +