Re: [PATCH v19 04/14] KVM: arm64: Ensure GCS memory effects are visible
Mark Brown <[email protected]>
| Newsgroups | org.kernel.vger.linux-doc,dev.linux.lists.kvmarm,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-kernel,org.kernel.vger.linux-kselftest |
|---|---|
| Message-ID | <[email protected]> |
On Wed, Aug 19, 2026 at 06:23:11PM +0100, Leonardo Bras wrote: > You state that we do _not_ use GCS in the hypervisor, nor in the host. > I understand that we GCSB() when we exit the vcpu context, but why would we > need to GCSB() before getting back in? > If cpus will GCSB() on guest_exit, and host/hyp does not use GCS, there > should be no GCS pending operation at the entry point. That's there to ensure that updates written by another PE are seen, following the same pattern as DDI0487 M.c K10.6.5 example K10-8 (or the prior migration between PEs example, that has barriers due to the stack switch operations rather than as distinct instructions).
signature.asc
(application/pgp-signature, 488 B)
-----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmqF8QAACgkQJNaLcl1U h9BePQf+OGif9yTteOKxAeb4o+1LXzrTPgOt6KeKCzRt/t4tBBwTYB9KSRz2d3XT yKGUZN6J9H9c2DuQB5Bd5YmSvnkDeFSmbyZiP6B++oDN07DJ2HrGW722/VA+fxwY CU3zRqKUQT0K8AhGi5Sc2Xg+HANN+iG4FUTFstZSE+tw3ecm4/zZnabShXcJzpnQ LEomvP77gb8tl4SASjXN5Eqa2XxhEMD9uT5k714u+FVWQ9TC9I9zbnJb+DHgFJXF XVnObidvm7Hs+AsgUKi8Q4geY+CRRwVRqk0wRHCe+dF7iHOZFNDD0gGzJ2c5Hs/k NENDaUUsfBso4RvD56Xybejkncilbg== =swJ4 -----END PGP SIGNATURE-----