Re: [PATCH v4] EDAC/altera: use ECC manager compatible to select A10/S10 IRQ layout

Hi Dinh,

Thank you. I am glad that v4 tested clean on both platforms.

On the two remaining ifdefs: I originally left them as-is because they
guard the double-bit-error path, where the SError handling and
arm_smccc_smc() reboot are arm64-specific. Converting to is_s10 would
compile s10_edac_dberr_handler() on 32-bit too, but that looks fine
since the symbols it needs (arm_smccc_smc, INTEL_SIP_SMC_ECC_DBE, the
S10 sysmgr defines) are all available on 32-bit socfpga.

I'd like your opinion before sending it. If you'd like them removed,
I'll do it as a separate commit, patch 2/2 in a v5 series, since the
DB-error path is a distinct change from the IRQ-index selection.

Thanks,
Rounak