Re: [PATCH 2/9] EDAC/versalnet: Add NULL check for mci in remove_one_mc()

Shubhrajyoti Datta <[email protected]>
Newsgroups org.kernel.vger.linux-edac,org.kernel.vger.linux-kernel
Message-ID <CAKfKVtEOn-jSiqHs9zGc4qNahQUy3XbAuACgtE5joF_ctGxjMw@mail.gmail.com>
On Mon, Aug 3, 2026 at 9:59 PM Borislav Petkov <[email protected]> wrote:
>
> On Mon, Aug 03, 2026 at 08:14:17PM +0530, Shubhrajyoti Datta wrote:
> > The current driver assumes that all 8 DDRMC controllers are present and
> > indexed contiguously. If there are only 2 controllers then the bus
> > width will be
> > unrecognized.
>
> I just love it how you folks evade the question:

Apologies for the confusion and the back-and-forth.
I'll use inline replies going forward to make the discussion easier to follow.
>
> "When will that happen?"

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/edac/versalnet_edac.c?h=v7.2-rc7#n64
The number of controllers is set to 8.

If the design enables only one controller, the crash will get
triggered in rmmod.
>
> How real is this issue?
Yes, this is a real issue. When fewer than 8 controllers are enabled in the
Vivado design, the remove path still attempts to clean up all 8 controllers.

>
> Give me a proper scenario when this is possible please.

The driver currently assumes that all 8 controllers are instantiated. However,
Vivado allows users to enable only a subset of them. For example, if only 4
controllers are enabled, only indices 0-3 will be populated with valid data
structures. During rmmod, the driver attempts to remove all 8 controllers,
including uninitialized entries, which can lead to a crash due to invalid memory
access.
>
> --
> Regards/Gruss,
>     Boris.
>
> https://people.kernel.org/tglx/notes-about-netiquette
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