Re: [PATCH v7 3/3] fpga-mgr: Add Efinix SPI programming driver
Xu Yilun <[email protected]> Mon, 4 May 2026 19:18:15 +0800
| Newsgroups | org.kernel.vger.linux-fpga,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <afiAdwJ9NOg/sPUr@yilunxu-OptiPlex-7050> |
On Thu, Apr 16, 2026 at 04:42:36PM +0200, [email protected] wrote: > From: Ian Dannapel <[email protected]> > > Add a new driver for loading binary firmware to configuration > RAM using "SPI passive mode" on Efinix FPGAs. > > Efinix passive SPI configuration requires chip select to remain asserted > from reset until the complete bitstream and trailing idle clocks have > been transferred, so the driver keeps CS active with cs_change and locks > the SPI bus for the duration of configuration. > > Signed-off-by: Ian Dannapel <[email protected]> Reviewed-by: Xu Yilun <[email protected]> I applied this series to for-next. Thanks.