Re: [PATCH v2] driver: fpga: xilinx-selectmap: add csi and rdwr support

Xu Yilun <[email protected]> Thu, 23 Jul 2026 12:42:38 +0800
Newsgroups org.kernel.vger.linux-fpga,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-kernel
Message-ID <amGbvtMWHXjpE35D@yilunxu-OptiPlex-7050>
On Tue, Jul 21, 2026 at 01:42:52PM +0200, Heiko Schocher wrote:
> Add csi_b and rdwr pin support for the xilinx,selectmap driver.
> 
> In current driver the pins are configured from DTS and set to
> GPIOD_OUT_HIGH. This works in case you have one FPGA.
> 
> Extend this to really implement csi_b and rdwr pin function in
> driver, so it works with more than one FPGA.

Please help specify in changelog: what do csi_b, rdwr pins do? Why they
now work with one FPGA but not with 2 FPGAs? How do you select which FPGA
to reprogram? thanks.

Thanks,
Yilun