[PATCH 0/2] pinctrl: rockchip: Two fixes for latent driver bugs
Simon Glass <[email protected]> Mon, 3 Aug 2026 08:10:22 -0600
| Newsgroups | org.kernel.vger.linux-gpio,org.infradead.lists.linux-arm-kernel,org.infradead.lists.linux-rockchip,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
This series contains two small fixes for pre-existing issues in the Rockchip pinctrl driver, found by the sashiko AI review of my RV1106 series. The first makes the SoC-data calculation safe when the probe runs more than once due to a probe deferral: the pin count currently accumulates across runs, shifting every bank's pin base. The second aligns the RV1103B drive-type override in the get path with the set path, which restricts it to bank 2. The first fix is tested on a Luckfox Pico Mini B by forcing the probe to defer once: without the fix the second probe doubles the pin count and no GPIO bank comes up, while with it the values are recalculated identically and all banks work. The second is a behavioural no-op until drive-strength decoding is added to the get path, so it is verified by inspection against the set path. Simon Glass (2): pinctrl: rockchip: Reset the pin count when recalculating SoC data pinctrl: rockchip: Restrict the RV1103B 2-bit drive type to bank 2 drivers/pinctrl/pinctrl-rockchip.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) --- base-commit: fc02acf6ac0ccde0c805c2daa9148683cdd01ba8 branch: rkpinfix -- 2.43.0