RE: Up Squared Pro 7000 (UPN-ADLN01) broken BIOS?

Dear Andy,

Thank you for your feedback, and we sincerely apologize for the delay.

We are currently updating the BIOS to configure the HAT connector pins to GPIO/GPO mode, which will ensure interrupt support on the OS side. We will update the BIOS as soon as possible and share it with you for testing.

Thanks again for your patience and support.

Best regards,
Billy Chou


-----Original Message-----
From: JunYingLai 賴俊穎 <[email protected]> 
Sent: Thursday, July 23, 2026 2:48 PM
To: BillyChou 周博倫 <[email protected]>
Subject: FW: Up Squared Pro 7000 (UPN-ADLN01) broken BIOS?

FYI

Best Regards,
JunYing Lai

JunYing Lai
AAEON Technology Inc.
5F, No. 135, Lane 235, Pao Chiao Rd.
Hsin-Tien Dist, New Taipei City, 231
Taiwan, R.O.C.


TEL: +886-2-8919-1234 Ext.1891



-----Original Message-----
From: Andy Shevchenko <[email protected]>
Sent: Friday, July 10, 2026 5:11 PM
To: GaryWang <[email protected]>
Cc: JunYingLai 賴俊穎 <[email protected]>; Thomas Richard <[email protected]>; [email protected]; JasonHuang 黃仁杰 <[email protected]>
Subject: Re: Up Squared Pro 7000 (UPN-ADLN01) broken BIOS?

這是外部郵件：在打開連結和附件之前，請確保電子郵件是安全的。 This is an external email: please make sure the email is secure before opening links and attachments.

On Fri, Jul 10, 2026 at 04:37:56PM +0800, GaryWang wrote:
> Add AAEON software JunYing.

Thanks, waiting for the response!

> yeah the ACPI flag should not set for HAT pins, JunYin knows it, They 
> clear the ACPI flag from the driver now, their BIOS uses the default 
> from CRB, but they should fix it from the BIOS to match the right usage.

How do they clean it from the driver? IIRC the ownership registers are locked when BIOS hands over to the OS. Technically any pin that marked as GPIO input must not be owned by ACPI to allow users to connect whatever they want there and get an interrupts. Many of them also have "Locked full" permissions, that's also may not be convenient. Another thing is the absence of bi-di GPIO configuration (or did I miss that?), which people may want to have (my use case, for instance).

In any case I have latest and greatest BIOS version (r3.5 of this year) and problem still persists. Can AAEON share a BIOS for testing? (Note, if you want, it can be done under our Intel-AAEON existing NDA, I believe.)

> On Fri, Jul 10, 2026 at 4:48 AM Andy Shevchenko 
> <[email protected]> wrote:
> >
> > Since I have been playing with the $Subject board, I wondering if I 
> > miss something or the BIOS configuration is utterly broken. The 
> > problem what I see is that most of the pins on the SoC are marked 
> > with [ACPI] if you look at the debugfs 'pins' file for INTC1057:00 device instance.
> >
> > This means *none* of them (which are user visible via HAT connector) 
> > may serve as an interrupt resource to the OS. How the OS should 
> > request interrupts on those pins?
> >
> > As far as I understand that the BIOS does initial settings of CPLD 
> > and basically I can use transparently the pins as per their 
> > configuration done in BIOS. Right?
> >
> > Btw, do we have any contacts to engineers in AAEON or whoever who 
> > does these UP boards nowadays?

--
With Best Regards,
Andy Shevchenko