Re: [PATCH v5 03/21] dt-bindings: pinctrl: Add starfive,jhb100-sys0-pinctrl
Linus Walleij <[email protected]>
| Newsgroups | org.kernel.vger.linux-gpio,org.infradead.lists.linux-riscv,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
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| Message-ID | <CAD++jL=Q38HwraN1NEOxLf_hE+k=3Q6JP+DUgQsThfYve0t0RA@mail.gmail.com> |
On Fri, Aug 14, 2026 at 1:22 PM Changhuang Liang <[email protected]> wrote: > > You still did not explain the cells - neither in reply nor in commit - thus start > > with that. Why do you need it? Multiple controllers have groupped pins or > > GPIOs in registers, so explanation "every 32 GPIOs correspond to one register" > > tells me nothing. Why would that matter how many GPIOs is in one register? > > Since every 32 GPIOs correspond to one register, Linus suggested at the time that I could try using: > gpios = <&gpio [instance] offset flags>; > gpio-ranges = <&pinctrl [gpio_instance] gpio_offset pin_offset count>; > > The advantage of using this is that in a GPIO controller with more than 32 GPIOs, every 32 GPIOs > can be treated as one GPIO bank. This way, in the driver, converting pin_offset to gpio_offset does > not require a large number of /32 and %32 operations. > > the following is Linus's original suggestion at the time > https://lore.kernel.org/all/CAD++jL=tvDBWJHRGGJw4nnox_kcJKn5hwvwz9zxadMRedyvRhw@mail.gmail.com/ Just copy this explanation into the commit so it is clear why you need three cells for this. Yours, Linus Walleij