RE: [PATCH v2 12/13] treewide: convert rdmsrq() from a macro to an inline function

From: Juergen Gross <[email protected]> Sent: Wednesday, August 19, 2026 3:23 AM
> 
> Today rdmsrq() is a macro using its second parameter as the target for
> storing the read MSR value.
> 
> Convert rdmsrq() to an inline function returning the MSR value.
> 
> The users have been converted using the following semantic patch:
> 
>   // Options: --include-headers
> 
>   virtual patch
>   virtual report
> 
>   @@
>   expression msr, val;
>   @@
>   (
>   - rdmsrq(msr,val)
>   + val = rdmsrq(msr)
>   )
> 
> Signed-off-by: Juergen Gross <[email protected]>
> ---
>  arch/x86/coco/sev/core.c                      |  2 +-
>  arch/x86/events/amd/brs.c                     |  4 +--
>  arch/x86/events/amd/core.c                    |  4 +--
>  arch/x86/events/amd/ibs.c                     | 18 +++++-----
>  arch/x86/events/amd/lbr.c                     |  8 ++---
>  arch/x86/events/amd/power.c                   |  8 ++---
>  arch/x86/events/amd/uncore.c                  |  4 +--
>  arch/x86/events/core.c                        | 20 +++++------
>  arch/x86/events/intel/core.c                  | 11 +++---
>  arch/x86/events/intel/cstate.c                |  2 +-
>  arch/x86/events/intel/ds.c                    |  2 +-
>  arch/x86/events/intel/knc.c                   |  6 ++--
>  arch/x86/events/intel/lbr.c                   | 14 ++++----
>  arch/x86/events/intel/p4.c                    |  6 ++--
>  arch/x86/events/intel/p6.c                    |  4 +--
>  arch/x86/events/intel/pt.c                    | 12 +++----
>  arch/x86/events/intel/uncore.c                |  2 +-
>  arch/x86/events/intel/uncore_nhmex.c          |  4 +--
>  arch/x86/events/intel/uncore_snb.c            |  2 +-
>  arch/x86/events/intel/uncore_snbep.c          |  6 ++--
>  arch/x86/events/msr.c                         |  2 +-
>  arch/x86/events/perf_event.h                  |  6 ++--
>  arch/x86/events/rapl.c                        |  4 +--
>  arch/x86/events/zhaoxin/core.c                |  6 ++--
>  arch/x86/hyperv/hv_apic.c                     |  6 ++--
>  arch/x86/hyperv/hv_init.c                     | 26 +++++++-------
>  arch/x86/hyperv/hv_spinlock.c                 |  2 +-
>  arch/x86/include/asm/apic.h                   |  4 +--
>  arch/x86/include/asm/debugreg.h               |  2 +-
>  arch/x86/include/asm/fsgsbase.h               |  2 +-
>  arch/x86/include/asm/kvm_host.h               |  2 +-
>  arch/x86/include/asm/msr.h                    | 15 ++++----
>  arch/x86/include/asm/paravirt.h               |  8 ++---
>  arch/x86/kernel/apic/apic.c                   | 14 ++++----
>  arch/x86/kernel/apic/apic_numachip.c          |  6 ++--
>  arch/x86/kernel/cet.c                         |  2 +-
>  arch/x86/kernel/cpu/amd.c                     | 14 ++++----
>  arch/x86/kernel/cpu/aperfmperf.c              |  8 ++---
>  arch/x86/kernel/cpu/bugs.c                    | 12 +++----
>  arch/x86/kernel/cpu/bus_lock.c                |  8 ++---
>  arch/x86/kernel/cpu/centaur.c                 |  8 ++---
>  arch/x86/kernel/cpu/common.c                  | 12 +++----
>  arch/x86/kernel/cpu/feat_ctl.c                |  4 +--
>  arch/x86/kernel/cpu/hygon.c                   |  4 +--
>  arch/x86/kernel/cpu/intel.c                   |  6 ++--
>  arch/x86/kernel/cpu/intel_epb.c               |  4 +--
>  arch/x86/kernel/cpu/mce/amd.c                 |  4 +--
>  arch/x86/kernel/cpu/mce/core.c                |  8 ++---
>  arch/x86/kernel/cpu/mce/inject.c              |  2 +-
>  arch/x86/kernel/cpu/mce/intel.c               | 18 +++++-----
>  arch/x86/kernel/cpu/mce/p5.c                  |  8 ++---
>  arch/x86/kernel/cpu/mce/winchip.c             |  2 +-
>  arch/x86/kernel/cpu/microcode/intel.c         |  2 +-
>  arch/x86/kernel/cpu/mshyperv.c                |  6 ++--
>  arch/x86/kernel/cpu/mtrr/amd.c                |  4 +--
>  arch/x86/kernel/cpu/mtrr/cleanup.c            |  4 +--
>  arch/x86/kernel/cpu/mtrr/generic.c            | 32 ++++++++---------
>  arch/x86/kernel/cpu/mtrr/mtrr.c               |  2 +-
>  arch/x86/kernel/cpu/resctrl/core.c            |  2 +-
>  arch/x86/kernel/cpu/resctrl/monitor.c         |  4 +--
>  arch/x86/kernel/cpu/resctrl/pseudo_lock.c     |  4 +--
>  arch/x86/kernel/cpu/resctrl/rdtgroup.c        |  2 +-
>  arch/x86/kernel/cpu/topology.c                |  2 +-
>  arch/x86/kernel/cpu/topology_amd.c            |  4 +--
>  arch/x86/kernel/cpu/transmeta.c               |  2 +-
>  arch/x86/kernel/cpu/tsx.c                     | 10 +++---
>  arch/x86/kernel/cpu/umwait.c                  |  2 +-
>  arch/x86/kernel/cpu/zhaoxin.c                 |  4 +--
>  arch/x86/kernel/fpu/core.c                    |  2 +-
>  arch/x86/kernel/hpet.c                        |  2 +-
>  arch/x86/kernel/kvm.c                         |  2 +-
>  arch/x86/kernel/mmconf-fam10h_64.c            |  6 ++--
>  arch/x86/kernel/process.c                     |  4 +--
>  arch/x86/kernel/process_64.c                  | 14 ++++----
>  arch/x86/kernel/shstk.c                       |  8 ++---
>  arch/x86/kernel/traps.c                       |  4 +--
>  arch/x86/kernel/tsc.c                         |  2 +-
>  arch/x86/kernel/tsc_msr.c                     |  6 ++--
>  arch/x86/kernel/tsc_sync.c                    |  6 ++--
>  arch/x86/kvm/svm/pmu.c                        |  4 +--
>  arch/x86/kvm/svm/svm.c                        |  4 +--
>  arch/x86/kvm/vmx/nested.c                     |  4 +--
>  arch/x86/kvm/vmx/pmu_intel.c                  |  8 ++---
>  arch/x86/kvm/vmx/sgx.c                        |  6 ++--
>  arch/x86/kvm/vmx/vmx.c                        | 36 +++++++++----------
>  arch/x86/kvm/x86.c                            |  8 ++---
>  arch/x86/lib/insn-eval.c                      |  6 ++--
>  arch/x86/lib/msr-smp.c                        |  2 +-
>  arch/x86/mm/pat/memtype.c                     |  2 +-
>  arch/x86/pci/amd_bus.c                        |  8 ++---
>  arch/x86/platform/olpc/olpc-xo1-rtc.c         |  6 ++--
>  arch/x86/platform/olpc/olpc-xo1-sci.c         |  2 +-
>  arch/x86/power/cpu.c                          | 10 +++---
>  arch/x86/realmode/init.c                      |  2 +-
>  arch/x86/virt/hw.c                            |  8 ++---
>  arch/x86/virt/svm/sev.c                       | 18 +++++-----
>  arch/x86/virt/vmx/tdx/tdx.c                   |  2 +-
>  arch/x86/xen/suspend.c                        |  2 +-
>  drivers/acpi/processor_perflib.c              |  2 +-
>  drivers/ata/pata_cs5535.c                     |  4 +--
>  drivers/ata/pata_cs5536.c                     |  2 +-
>  drivers/char/agp/nvidia-agp.c                 |  6 ++--
>  drivers/char/hw_random/via-rng.c              |  4 +--
>  drivers/cpufreq/acpi-cpufreq.c                |  8 ++---
>  drivers/cpufreq/amd-pstate.c                  |  4 +--
>  drivers/cpufreq/e_powersaver.c                | 20 +++++------
>  drivers/cpufreq/intel_pstate.c                | 30 ++++++++--------
>  drivers/cpufreq/longhaul.c                    | 12 +++----
>  drivers/cpufreq/longrun.c                     | 16 ++++-----
>  drivers/cpufreq/powernow-k7.c                 | 10 +++---
>  drivers/cpufreq/powernow-k8.c                 |  8 ++---
>  drivers/cpufreq/speedstep-centrino.c          |  4 +--
>  drivers/cpufreq/speedstep-lib.c               | 14 ++++----
>  drivers/edac/amd64_edac.c                     |  6 ++--
>  drivers/gpio/gpio-cs5535.c                    |  2 +-
>  drivers/hv/mshv_vtl_main.c                    |  2 +-
>  drivers/hwmon/hwmon-vid.c                     |  4 +--
>  drivers/idle/intel_idle.c                     | 26 +++++++-------
>  drivers/misc/cs5535-mfgpt.c                   |  6 ++--
>  drivers/mtd/nand/raw/cs553x_nand.c            |  6 ++--
>  drivers/platform/x86/intel/ifs/load.c         | 10 +++---
>  drivers/platform/x86/intel/ifs/runtest.c      |  8 ++---
>  drivers/platform/x86/intel/pmc/cnp.c          |  2 +-
>  .../intel/speed_select_if/isst_if_mbox_msr.c  |  6 ++--
>  .../intel/speed_select_if/isst_tpmi_core.c    |  2 +-
>  drivers/platform/x86/intel_ips.c              | 20 +++++------
>  drivers/powercap/intel_rapl_msr.c             |  2 +-
>  drivers/thermal/intel/intel_hfi.c             |  8 ++---
>  drivers/thermal/intel/therm_throt.c           | 22 ++++++------
>  drivers/thermal/intel/x86_pkg_temp_thermal.c  |  6 ++--
>  drivers/video/fbdev/geode/display_gx.c        |  2 +-
>  drivers/video/fbdev/geode/gxfb_core.c         |  2 +-
>  drivers/video/fbdev/geode/lxfb_ops.c          | 18 +++++-----
>  drivers/video/fbdev/geode/suspend_gx.c        |  8 ++---
>  drivers/video/fbdev/geode/video_gx.c          |  8 ++---
>  include/linux/cs5535.h                        |  2 +-
>  136 files changed, 484 insertions(+), 486 deletions(-)
> 

[snip]

> diff --git a/arch/x86/hyperv/hv_apic.c b/arch/x86/hyperv/hv_apic.c
> index 95f1782d1e17..4e30f9a11bc4 100644
> --- a/arch/x86/hyperv/hv_apic.c
> +++ b/arch/x86/hyperv/hv_apic.c
> @@ -38,7 +38,7 @@ static u64 hv_apic_icr_read(void)
>  {
>  	u64 reg_val;
> 
> -	rdmsrq(HV_X64_MSR_ICR, reg_val);
> +	reg_val = rdmsrq(HV_X64_MSR_ICR);
>  	return reg_val;
>  }
> 
> @@ -64,10 +64,10 @@ static u32 hv_apic_read(u32 reg)
> 
>  	switch (reg) {
>  	case APIC_EOI:
> -		rdmsrq(HV_X64_MSR_EOI, reg_val.q);
> +		reg_val.q = rdmsrq(HV_X64_MSR_EOI);
>  		return reg_val.l;
>  	case APIC_TASKPRI:
> -		rdmsrq(HV_X64_MSR_TPR, reg_val.q);
> +		reg_val.q = rdmsrq(HV_X64_MSR_TPR);
>  		return reg_val.l;
> 
>  	default:
> diff --git a/arch/x86/hyperv/hv_init.c b/arch/x86/hyperv/hv_init.c
> index 55a8b6de2865..bc8f91114868 100644
> --- a/arch/x86/hyperv/hv_init.c
> +++ b/arch/x86/hyperv/hv_init.c
> @@ -101,7 +101,7 @@ static int hyperv_init_ghcb(void)
>  	 * returned by MSR_AMD64_SEV_ES_GHCB is above shared
>  	 * memory boundary and map it here.
>  	 */
> -	rdmsrq(MSR_AMD64_SEV_ES_GHCB, ghcb_gpa);
> +	ghcb_gpa = rdmsrq(MSR_AMD64_SEV_ES_GHCB);
> 
>  	/* Mask out vTOM bit and map as decrypted */
>  	ghcb_gpa &= ~ms_hyperv.shared_gpa_boundary;
> @@ -134,7 +134,7 @@ static int hv_cpu_init(unsigned int cpu)
>  		 * For root partition we get the hypervisor provided VP assist
>  		 * page, instead of allocating a new page.
>  		 */
> -		rdmsrq(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64);
> +		msr.as_uint64 = rdmsrq(HV_X64_MSR_VP_ASSIST_PAGE);
>  		*hvp = memremap(msr.pfn << HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT,
>  				PAGE_SIZE, MEMREMAP_WB);
>  	} else {
> @@ -183,7 +183,7 @@ static void hv_reenlightenment_notify(struct work_struct *dummy)
>  {
>  	struct hv_tsc_emulation_status emu_status;
> 
> -	rdmsrq(HV_X64_MSR_TSC_EMULATION_STATUS, *(u64 *)&emu_status);
> +	*(u64 *)&emu_status = rdmsrq(HV_X64_MSR_TSC_EMULATION_STATUS);
> 
>  	/* Don't issue the callback if TSC accesses are not emulated */
>  	if (hv_reenlightenment_cb && emu_status.inprogress)
> @@ -196,11 +196,11 @@ void hyperv_stop_tsc_emulation(void)
>  	u64 freq;
>  	struct hv_tsc_emulation_status emu_status;
> 
> -	rdmsrq(HV_X64_MSR_TSC_EMULATION_STATUS, *(u64 *)&emu_status);
> +	*(u64 *)&emu_status = rdmsrq(HV_X64_MSR_TSC_EMULATION_STATUS);
>  	emu_status.inprogress = 0;
>  	wrmsrq(HV_X64_MSR_TSC_EMULATION_STATUS, *(u64 *)&emu_status);
> 
> -	rdmsrq(HV_X64_MSR_TSC_FREQUENCY, freq);
> +	freq = rdmsrq(HV_X64_MSR_TSC_FREQUENCY);
>  	tsc_khz = div64_u64(freq, 1000);
>  }
>  EXPORT_SYMBOL_GPL(hyperv_stop_tsc_emulation);
> @@ -260,7 +260,7 @@ void clear_hv_tscchange_cb(void)
>  	if (!hv_reenlightenment_available())
>  		return;
> 
> -	rdmsrq(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *(u64 *)&re_ctrl);
> +	*(u64 *)&re_ctrl = rdmsrq(HV_X64_MSR_REENLIGHTENMENT_CONTROL);
>  	re_ctrl.enabled = 0;
>  	wrmsrq(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *(u64 *)&re_ctrl);
> 
> @@ -297,7 +297,7 @@ static int hv_cpu_die(unsigned int cpu)
>  			 */
>  			memunmap(hv_vp_assist_page[cpu]);
>  			hv_vp_assist_page[cpu] = NULL;
> -			rdmsrq(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64);
> +			msr.as_uint64 = rdmsrq(HV_X64_MSR_VP_ASSIST_PAGE);
>  			msr.enable = 0;
>  		}
>  		wrmsrq(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64);
> @@ -306,7 +306,7 @@ static int hv_cpu_die(unsigned int cpu)
>  	if (hv_reenlightenment_cb == NULL)
>  		return 0;
> 
> -	rdmsrq(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *((u64 *)&re_ctrl));
> +	*((u64 *)&re_ctrl) = rdmsrq(HV_X64_MSR_REENLIGHTENMENT_CONTROL);
>  	if (re_ctrl.target_vp == hv_vp_index[cpu]) {
>  		/*
>  		 * Reassign reenlightenment notifications to some other online
> @@ -377,7 +377,7 @@ static int hv_suspend(void *data)
>  	hv_set_hypercall_pg(NULL);
> 
>  	/* Disable the hypercall page in the hypervisor */
> -	rdmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
> +	hypercall_msr.as_uint64 = rdmsrq(HV_X64_MSR_HYPERCALL);
>  	hypercall_msr.enable = 0;
>  	wrmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
> 
> @@ -394,7 +394,7 @@ static void hv_resume(void *data)
>  	WARN_ON(ret);
> 
>  	/* Re-enable the hypercall page */
> -	rdmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
> +	hypercall_msr.as_uint64 = rdmsrq(HV_X64_MSR_HYPERCALL);
>  	hypercall_msr.enable = 1;
>  	hypercall_msr.guest_physical_address =
>  		vmalloc_to_pfn(hv_hypercall_pg_saved);
> @@ -529,7 +529,7 @@ void __init hyperv_init(void)
>  	if (hv_hypercall_pg == NULL)
>  		goto clean_guest_os_id;
> 
> -	rdmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
> +	hypercall_msr.as_uint64 = rdmsrq(HV_X64_MSR_HYPERCALL);
>  	hypercall_msr.enable = 1;
> 
>  	if (hv_root_partition()) {
> @@ -671,7 +671,7 @@ void hyperv_report_panic(struct pt_regs *regs, long err, bool in_die)
>  		return;
>  	panic_reported = true;
> 
> -	rdmsrq(HV_X64_MSR_GUEST_OS_ID, guest_id);
> +	guest_id = rdmsrq(HV_X64_MSR_GUEST_OS_ID);
> 
>  	wrmsrq(HV_X64_MSR_CRASH_P0, err);
>  	wrmsrq(HV_X64_MSR_CRASH_P1, guest_id);
> @@ -705,7 +705,7 @@ bool hv_is_hyperv_initialized(void)
>  	 * that the hypercall page is setup
>  	 */
>  	hypercall_msr.as_uint64 = 0;
> -	rdmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
> +	hypercall_msr.as_uint64 = rdmsrq(HV_X64_MSR_HYPERCALL);
> 
>  	return hypercall_msr.enable;
>  }
> diff --git a/arch/x86/hyperv/hv_spinlock.c b/arch/x86/hyperv/hv_spinlock.c
> index 6b4bdea18218..7ef2d794e2e8 100644
> --- a/arch/x86/hyperv/hv_spinlock.c
> +++ b/arch/x86/hyperv/hv_spinlock.c
> @@ -50,7 +50,7 @@ static void hv_qlock_wait(u8 *byte, u8 val)
>  	if (READ_ONCE(*byte) == val) {
>  		unsigned long msr_val;
> 
> -		rdmsrq(HV_X64_MSR_GUEST_IDLE, msr_val);
> +		msr_val = rdmsrq(HV_X64_MSR_GUEST_IDLE);
> 
>  		(void)msr_val;
>  	}

[snip]

> diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
> index 185d4f677ec0..65ad235ef5c6 100644
> --- a/arch/x86/kernel/cpu/mshyperv.c
> +++ b/arch/x86/kernel/cpu/mshyperv.c
> @@ -74,7 +74,7 @@ u64 hv_get_non_nested_msr(unsigned int reg)
>  	if (hv_is_synic_msr(reg) && ms_hyperv.paravisor_present)
>  		hv_ivm_msr_read(reg, &value);
>  	else
> -		rdmsrq(reg, value);
> +		value = rdmsrq(reg);
>  	return value;
>  }
>  EXPORT_SYMBOL_GPL(hv_get_non_nested_msr);
> @@ -399,7 +399,7 @@ static unsigned long hv_get_tsc_khz(void)
>  {
>  	unsigned long freq;
> 
> -	rdmsrq(HV_X64_MSR_TSC_FREQUENCY, freq);
> +	freq = rdmsrq(HV_X64_MSR_TSC_FREQUENCY);
> 
>  	return freq / 1000;
>  }
> @@ -645,7 +645,7 @@ static void __init ms_hyperv_init_platform(void)
>  		 */
>  		u64	hv_lapic_frequency;
> 
> -		rdmsrq(HV_X64_MSR_APIC_FREQUENCY, hv_lapic_frequency);
> +		hv_lapic_frequency = rdmsrq(HV_X64_MSR_APIC_FREQUENCY);
>  		hv_lapic_frequency = div_u64(hv_lapic_frequency, HZ);
>  		lapic_timer_period = hv_lapic_frequency;
>  		pr_info("Hyper-V: LAPIC Timer Frequency: %#x\n",

For this Hyper-V specific code,

Reviewed-by: Michael Kelley <[email protected]>