Re: [PATCH 2/3] dt-bindings: pinctrl: Add EcoNet EN7528 pin controller

Krzysztof Kozlowski <[email protected]>
Newsgroups org.kernel.vger.linux-gpio,org.infradead.lists.linux-mediatek,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel
Message-ID <20260828-adorable-bug-from-arcadia-fcad00@quoll>
On Sun, Aug 09, 2026 at 12:04:59PM +0400, Ahmed Naseef wrote:
> +maintainers:
> +  - Lorenzo Bianconi <[email protected]>
> +
> +description:
> +  The EcoNet EN7528 pin controller is used to control SoC pins. It shares the
> +  IP with the Airoha pin controllers, but its IOMUX and pin configuration
> +  registers have a different layout.
> +
> +properties:
> +  compatible:
> +    const: econet,en7528-pinctrl
> +
> +  airoha,chip-scu:
> +    description: phandle to the chip SCU syscon
> +    $ref: /schemas/types.yaml#/definitions/phandle

If the entire address space is part of the SCU, then this device should
be part of the SCU, e.g. its subnode.

> +
> +  interrupts:
> +    maxItems: 1
> +
> +  gpio-controller: true
> +
> +  '#gpio-cells':
> +    const: 2
> +
> +  gpio-ranges:
> +    maxItems: 1
> +
> +  interrupt-controller: true
> +
> +  '#interrupt-cells':
> +    const: 2
> +
> +allOf:

This goes to the end of the file, before the additionalProperties.

> +  - $ref: pinctrl.yaml#
> +
> +required:
> +  - compatible
> +  - airoha,chip-scu
> +  - interrupts
> +  - gpio-controller
> +  - gpio-ranges
> +  - "#gpio-cells"
> +  - interrupt-controller
> +  - "#interrupt-cells"
> +
> +patternProperties:
> +  '-pins$':
> +    type: object

"patternProperties" should follow "properties"

> +
> +    patternProperties:
> +      '^mux(-|$)':
> +        type: object
> +
> +        description:
> +          pinmux configuration nodes.
> +
> +        $ref: /schemas/pinctrl/pinmux-node.yaml
> +
> +        properties:
> +          function:
> +            description:
> +              A string containing the name of the function to mux to the group.
> +            enum: [gpio, jtag, pcie_reset, pcm, pcm_spi, phy1_led0,
> +                   phy1_led1, phy2_led0, phy2_led1, phy3_led0, phy3_led1,
> +                   phy4_led0, phy4_led1, pnand, pon, pwm, sipo, spi, uart]

Best regards,
Krzysztof
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