Re: Assign BAR address for pci device after hotplug

May be i missed one piece of information. I thought i had that in my 
inline response but just realized i missed it. 

Device 0 ( FPGA 0), has custom logic which will detect the presence of 
the card 1 and card 2 and controls the power switches to the same. So If 
this makes fpga0 a "hotplug controller " then i can add the resource 
management logic/code for devices on card 1 and card 2 to this driver. 
Currently fpga_0 driver does some init for some of the devices on 
itself. can i follow any hp controller driver example to do the above or 
is there any specific driver/eg i can follow? noted your point on reading 
the spec for the details and i am on it. 

HW details:
x86 ( Soc) -> pcie root port 0 -> Device 0 (FPGA_0 )
x86 ( Soc) -> pcie root port 1 -> [ pcie-switch_1_port 1 -> Device 1 
(FPGA_1 ) ]

x86 ( Soc) -> pcie root port 1 -> [ pcie-switch_1_port 2 -> Device 2 ]
x86 ( Soc) -> pcie root port 2 ->   pcie-switch_2_port 1 -> [ pcie-
switch_3_port 1 -> Device 3 ( FPGA_2) ]

x86 ( Soc) -> pcie root port 2 ->   pcie-switch_2_port 1 -> [ pcie-
switch_3_port 2 -> Device 4 ]

Thanks for your patience
Divakar