Re: [PATCH v3 1/5] i2c: qcom-cci: Switch msm8953 to the CCI v2 timing/rate config
Konrad Dybcio <[email protected]> Fri, 31 Jul 2026 16:06:19 +0200
| Newsgroups | org.kernel.vger.linux-i2c,org.kernel.vger.linux-arm-msm,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
On 7/29/26 2:25 PM, Loic Poulain wrote: > The msm8953 CCI timing table is internally inconsistent. Its Standard > and Fast timings match v1/v1.5, which are calibrated for a 19.2 MHz CCI > clock, but its Fast+ timings are essentially the v2 values, which are > calibrated for 37.5 MHz. Since all masters share a single CCI clock, > no single rate can satisfy all three modes with the current table, and > the DT assigns 19.2 MHz, so Fast+ timings are wrong. > > The msm8953 CCI is the same hardware version as msm8996/sdm630, which > already use the cci_v2_data config (37.5 MHz). 37.5 MHz is supported by > the msm8953 CCI RCG, so reuse cci_v2_data for msm8953 as well and drop > the redundant, inconsistent standalone table. This makes all three I2C > modes self-consistent under a single clock rate. > > Note this requires the CCI clock to run at 37.5 MHz, the driver selects > and enforces the proper rate in following patches. > > Tested-by: Wenmeng Liu <[email protected]> Wenmeng, have you actually tested this on MSM8953 device? Konrad