[PATCH v4 2/7] riscv: dts: eswin: add clock generator for EIC7700 SoC
Pinkesh Vaghela <[email protected]>
| Newsgroups | org.kernel.vger.linux-i2c,org.infradead.lists.linux-riscv,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
From: Pritesh Patel <[email protected]> Add clock generator node for EIC7700 SoC. HiFive Premier P550 boards have 24MHz crystal oscillator to provide the input clock. Signed-off-by: Pritesh Patel <[email protected]> Signed-off-by: Pinkesh Vaghela <[email protected]> --- .../boot/dts/eswin/eic7700-hifive-premier-p550.dts | 5 +++++ arch/riscv/boot/dts/eswin/eic7700.dtsi | 13 +++++++++++++ 2 files changed, 18 insertions(+) diff --git a/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts b/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts index 131ed1fc6b2e..a5c76b14a38f 100644 --- a/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts +++ b/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts @@ -20,6 +20,11 @@ chosen { }; }; +&osc { + clock-frequency = <24000000>; + clock-output-names = "osc_24m"; +}; + &uart0 { status = "okay"; }; diff --git a/arch/riscv/boot/dts/eswin/eic7700.dtsi b/arch/riscv/boot/dts/eswin/eic7700.dtsi index 430a210f01e6..b3a230870315 100644 --- a/arch/riscv/boot/dts/eswin/eic7700.dtsi +++ b/arch/riscv/boot/dts/eswin/eic7700.dtsi @@ -4,6 +4,7 @@ */ /dts-v1/; +#include <dt-bindings/clock/eswin,eic7700-clock.h> #include <dt-bindings/reset/eswin,eic7700-reset.h> / { @@ -203,6 +204,11 @@ pmu { <0x00000000 0x0000000f 0xfffffffc 0x000000ff 0x00000078>; }; + osc: oscillator { + compatible = "fixed-clock"; + #clock-cells = <0>; + }; + soc { compatible = "simple-bus"; ranges; @@ -343,6 +349,13 @@ gpioD: gpio-port@3 { }; }; + clk: clock-controller@51828000 { + compatible = "eswin,eic7700-clock"; + reg = <0x0 0x51828000 0x0 0x300>; + clocks = <&osc>; + #clock-cells = <1>; + }; + reset: reset-controller@51828300 { compatible = "eswin,eic7700-reset"; reg = <0x0 0x51828300 0x0 0x200>; -- 2.34.1