Re: [PATCH v5] i2c: designware: Enable SAR in slave mode for Multiple SAR controllers
Andy Shevchenko <[email protected]>
| Newsgroups | org.kernel.vger.linux-i2c,org.kernel.vger.linux-kernel |
|---|---|
| Organization | Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo |
| Message-ID | <[email protected]> |
On Mon, Aug 17, 2026 at 09:51:41PM +0530, Umesh Kumar wrote: > DesignWare controllers synthesised with the Multiple SAR feature (e.g. > Marvell CN20K) gate the primary slave address behind IC_ENABLE.SAR_EN > (bit 19). Per the Synopsys DW_apb_i2c DataBook v2.03a (Multiple SAR > feature), when this bit is set the core acknowledges the address matching > IC_SAR; otherwise the address is NACKed. The slave enable path writes only > IC_ENABLE.ENABLE (bit 0), so on such controllers the target never ACKs > its address and a remote master cannot reach it. > > Set SAR_EN together with ENABLE when entering slave mode. The bit is > reserved (and ignored) on single-SAR controllers, so existing users are > unaffected. I gave my tag and it is absent here. What's going on? Do you think the fix is not only that and requires a new round of review? -- With Best Regards, Andy Shevchenko