[PATCH v3 6/6] iio: adc: xilinx-xadc: Correct Write edge in CFG
Dileep Kumar Nagavarapu <[email protected]> Wed, 29 Jul 2026 18:24:55 +0530
| Newsgroups | org.kernel.vger.linux-iio,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
UG585 states about the PS-XADC interface configuration steps, REDGE is 1 and WEDGE is 0, this is consistent with the XADCIF_CFG register default value. Current driver set WEDGE which is inconsistent with TRM, this patch fix the WEDGE parameter setting. Signed-off-by: Conall O'Griofa <[email protected]> Signed-off-by: Dileep Kumar Nagavarapu <[email protected]> --- drivers/iio/adc/xilinx-xadc-platform.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iio/adc/xilinx-xadc-platform.c b/drivers/iio/adc/xilinx-xadc-platform.c index bd033315c72f..b113f904b8fa 100644 --- a/drivers/iio/adc/xilinx-xadc-platform.c +++ b/drivers/iio/adc/xilinx-xadc-platform.c @@ -346,7 +346,7 @@ static int xadc_zynq_setup(struct platform_device *pdev, struct iio_dev *indio_d xadc_write_reg(xadc, XADC_ZYNQ_REG_INTSTS, ~0); xadc_write_reg(xadc, XADC_ZYNQ_REG_INTMSK, xadc->zynq_intmask); xadc_write_reg(xadc, XADC_ZYNQ_REG_CFG, XADC_ZYNQ_CFG_ENABLE | XADC_ZYNQ_CFG_REDGE | - XADC_ZYNQ_CFG_WEDGE | tck_div | XADC_ZYNQ_CFG_IGAP(igap)); + tck_div | XADC_ZYNQ_CFG_IGAP(igap)); if (pcap_rate > XADC_ZYNQ_PCAP_RATE_MAX_HZ) { ret = clk_set_rate(xadc->clk, pcap_rate); -- 2.34.1