Re: [PATCH v4 2/2] iio: adc: add Axiado SARADC driver
Andy Shevchenko <[email protected]>
| Newsgroups | org.kernel.vger.linux-iio,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Organization | Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo |
| Message-ID | <[email protected]> |
On Tue, Jul 28, 2026 at 08:58:10AM +0200, Petar Stepanovic wrote:
> On 7/17/2026 10:34 AM, Andy Shevchenko wrote:
...
> >> +static const struct regmap_config axiado_saradc_regmap_config = {
> >> + .reg_bits = 32,
> >> + .val_bits = 32,
> >> + .reg_stride = 4,
> >> + .max_register = AX_SARADC_DOUT_REG,
> > No cache?
>
> No cache is intentional. The registers represent transient control, status,
> and conversion data, so accesses should always go directly to the hardware.
> Since REGCACHE_NONE is the default, it is not specified explicitly.
Perhaps add a short comment here to summarise the above?
--
With Best Regards,
Andy Shevchenko