[PATCH v2 0/3] iio: accel: adxl367: add INT2 interrupt pin support

The ADXL367 exposes two independent interrupt output pins, INT1 and INT2,
each with its own event mapping register that shares an identical bit
layout. So far the driver has assumed the INT1 pin is the connected one.

This series adds an "interrupt-names" device tree property so a board can
describe which pin is wired, and teaches the driver to route the interrupt
mappings to the matching register. When no "interrupt-names" is present the
driver keeps defaulting to INT1, so existing device trees are unaffected.

Patch 1 refreshes the maintainer entries, since Cosmin's Analog Devices
address no longer exists.

Changes in v2:
- New patch 1/3 updating the binding maintainers field and MAINTAINERS.
- Propagate -EPROBE_DEFER from fwnode_irq_get_byname().
- Drop the redundant irq return; the helper now only selects the INT map
  register.
- Picked up Rob's Reviewed-by on the interrupt-names binding patch.

Antoniu Miclaus (3):
  iio: accel: adxl367: update maintainer entries
  dt-bindings: iio: accel: adi,adxl367: add interrupt-names
  iio: accel: adxl367: add support for INT2 interrupt pin

 .../bindings/iio/accel/adi,adxl367.yaml       | 13 ++++++-
 MAINTAINERS                                   |  1 +
 drivers/iio/accel/adxl367.c                   | 39 +++++++++++++++++--
 3 files changed, 48 insertions(+), 5 deletions(-)


base-commit: 0b5e142ced4bcf20532da051934bd694d1bbd470
-- 
2.43.0